Other Parts Discussed in Thread: BQ78350
Hi Team,
My customer is noticing some strange behavior with the BQ78350-R1.
They are talking to the BQ78350 via the SMBus from a MCU, reading many registers every 250ms. Intermittently (maybe once every 10 seconds or so), when doing a word-read from the Host FET Control register (0x2B), the CRC check of the word-read will fail. Upon inspection of the data, we see the word read is returning 0xFF 0xFF 0xFF (low byte, high byte, crc). I'd expect to see something like (0x00 0x0X crc, where X < 3).
When looking at this on the scope, they see:
Start 0x16 Ack 0x2B Ack RepeatedStart 0x17 Ack (25ms clock stretch) 0xFF Ack 0xFF Ack 0xFF Nack
SCL and SDA lines held low for 25ms after the repeated start ACK. After the 25ms, SCL and SDA are released, and the PIC reads in 0xFF 0xFF 0xFF.
We would appreciate help understanding what the BQ78350 is doing, and why the SDA/SCL lines may be held low for so long. We only see this when reading the Host FET Control register (0x2B). All other registers work fine.
FYI - they actually don't need to read the Host FET Control register, so they have just removed that from their code base for now. But they'd appreciate understanding why this was happening to verify their system isn't marginal in other ways.
Thanks,
Mitchell
