TPS63060: TPS63060

zacharias brandt

Prodigy 250 points

Part Number: TPS63060

Hi, the data sheet of the TPS63060 shows a chip with 2+2 power GND but the the spec of the

DSC shows 4+4 power GND. Which one is the correct one?

You mentioned that the irush could be limited by raising the FB. How? I have only need for max 500mA

current and a slow start is perfectly ok since it will not load the battery and cables as much and

make the system more stable.

over 5 years ago

0 Milos over 5 years ago

TI__Expert 7925 points

Hi Zacharias,

It should be 4+4, but I will double check on Monday. Thank you for pointing this out.

To reduce the inrush current, you can follow the procedure in this application report, the principle is the same for the TPS63060:
http://www.ti.com/lit/an/slva307b/slva307b.pdf

Best regards,
Milos

0 zacharias brandt over 5 years ago

Prodigy 250 points

I also noted that the pad layout specified 5 via holes in the bottom pad, but the

exampe design shows that these pads have been brought outside of the bottom pad

which is now solid. What goes?

rgds

0 Brigitte over 5 years ago in reply to zacharias brandt

TI__Guru 65170 points

Hello Zachariah,

Both is possible. The example shows no holes because the device pad is on top of the holes. Please review the users guide of the EVM and you will find 12 holes in the pad area.

0 Milos over 5 years ago in reply to zacharias brandt

TI__Expert 7925 points

Hi Zacharias,

The example in the datasheet is a snippet of the layout of our evaluation module (EVM) TPS63060EVM-619. Page 8 and 9 of the EVM guide show the recommended layout, and there are vias shown under the pad. It is not absolutely necessary to have the pad completely filled with vias, but they help thermally if you plan to push the device to its limits, and keep the GND loop impedance as low as possible.

You can find the layout guidelines for TI PowerPAD devices here:
http://www.ti.com/lit/an/sloa120/sloa120.pdf

Best regards,
Milos

0 zacharias brandt over 5 years ago in reply to Milos

Prodigy 250 points

what did you find out?

rgds

zach

0 Moritz. over 5 years ago in reply to zacharias brandt

TI__Intellectual 1700 points

Hi Zacharias,

seems like there is a misunderstanding?

The last reply was a recommendation to you.

Is there something else you need?

Best Regards,

Moritz

0 zacharias brandt over 5 years ago in reply to Milos

Prodigy 250 points

still no answer to ths simple question?

0 zacharias brandt over 5 years ago in reply to Moritz.

Prodigy 250 points

It should be 4+4, but I will double check on Monday. Thank you for pointing this out.

To reduce the inrush current, you can follow the procedure in this application report, the principle is the same for the TPS63060:
http://www.ti.com/lit/an/slva307b/slva307b.pdf

Best regards,
Milos

I still have npo onswer on tis rather crucial question

0 Milos over 5 years ago in reply to zacharias brandt

TI__Expert 7925 points

Hi Zacharias,

I am sorry for overlooking this. It is indeed 4+4.

Best regards,
Milos

0 zacharias brandt over 5 years ago in reply to Milos

Prodigy 250 points

Thanks!

Another question - this Circuit is a buck-boost. The often generate much heat.

In my case I have 500mA current and from 5.5 to 8.5V input. In a totally closed

caseing, will that be a problem? The heat at the load is of no problem since

that is outside of the caseing. Will its high frequency cause pcb layout problems?

I have very Little space to work with.

rgds

0 Moritz. over 5 years ago in reply to zacharias brandt

TI__Intellectual 1700 points

Hi Zacharias,

Regarding the layout questions you have, please have a look at the example in the users guide here and to the layout section in the datasheet. If you stick to these suggestions, the frequency of the converter will be no issue. In general keep a proper direct GND connection, the in- and outputs caps very close to the device and very short current loops.

To calculate the junction temperature of the device, you need to use the thermal metric section in the spec. Assuming you PCB is a big heat sink and soldered to the PowerPad™ most of the power dissipation will happen through the PCB rather than the top of the package. Here is a guideline how to calculate the junction temperature. Enclosing the device will however change the thermal resistance.

The power dissipation can be calculated with the efficiency or power losses in the device and coil respectively. To spread the heat on the PCB a GND layer on the bottom of the board will help, if you connect the device with enough vias to it.

regards,

Moritz

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TPS63060: TPS63060