Hi,
Could you tell me about register reading during BIST?
Data sheet page 31 contains the following information:
"The SPI registers may be unavailable during a BIST, so no SPI reads or writes should be made while the BIST is running."
Customer is trying to access the SAFETY_STAT_3 register (D1：LBIST_RUN D0：ABIST_RUN) during BIST.
Do you have any problems with D1 and D2 read access during BIST?
Best Regards,
Yusuke
