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TPS65218D0: DCDC4 can not powered up to 3.3V at 5V VCC.

Part Number: TPS65218D0

 Hello guys,

 One of my customers is evaluating TPS65218D0 on thier own PCB.

 They faced that DCDC4 is not powered up to 3.3V in their evaluation.

 The behavior is very similar with the following E2E thread.

https://e2e.ti.com/support/power-management/f/196/p/844935/3125921?tisearch=e2e-sitesearch&keymatch=tps65218#3125921

  Could you give me what your solution for this tread was?

 Your reply would be much appreciated.

 Best regards,

 Kazuya. 

  • Kazuya-san,

    The majority of problems with TPS65218D0 in the PHP package are caused by the fact that the Thermal Pad pad is not electrically connected to the GND plane.

    There are no GND pins on the device. There are 48 pins and none of them are labeled GND. Therefore, the only electrical connection for GND must go through the Thermal Pad.

  •  Hello Brian,

     Thank you very much for your reply and I'm sorry to be late my response.

     The customer confirmed the power pad was soldered to GND PCB pattern correctly.

     Do you know any cause of the DCDC4 no start up except power pad no soldering?

     Also could you please give me your reply to the following additional questions?

     Q1. The customer don't use Load SW 1~3(LS1~3). 

            Could you please tell me how to treat related pins(IN_LS1, LS1, IN_LS2, LS2, IN_LS3, LS3)?

             Should all pins be connected to GND or be open?

     Q2. Is there any problem if GPIO1 and GPIO3 pin are open?

     Q3. Is there any problem if GPO2 is connected to GND?

      Thank you again and best regards,

     Kazuya Nakai.

               

  • Nakai-san, 

    Can you provide a schematic for this design and a photo showing the top-side marking for one of the TPS65218D0 PHP devices?

    Kazuya Nakai54 said:

     Q1. The customer don't use Load SW 1~3(LS1~3). 

            Could you please tell me how to treat related pins(IN_LS1, LS1, IN_LS2, LS2, IN_LS3, LS3)?

    Both IN_LSx and LSx pins should be left Open or both shorted to GND. As long as IN_LSx and LSx are terminated the same way, it does not matter.

    Kazuya Nakai54 said:
     Q2. Is there any problem if GPIO1 and GPIO3 pin are open?

    For GPIO1, it is configured as output by default, so open-circuit is good. For GPIO3, it is configured as input and should not be left floating. It should be pulled up to VIO in the system. If GPIO3 is seen as a low signal, it will cause warm reset on DCDC1/2. But this will not impact the power-up sequence or DCDC4 behavior.

    Kazuya Nakai54 said:
     Q3. Is there any problem if GPO2 is connected to GND?

    GPO2 is an output by default, configured as push-pull with the high-side FET connected to LS1. If there is no connection at IN_LS1, then it should not cause any issues.

    My concern is that there is something else in your schematic that is causing the issue. I cannot provide any more assistance without a Schematic to review, in addition to seeing the top-side marking for one of the PMIC devices on the failing PCBs.

  •  Hello Brian,

     Can we discuss this with off line? Could I have your e-mail address?

     Thank you very much and best regards,

     Kazuya.

  • Please share a photo showing the top-side marking for one of the TPS65218D0 PHP devices.

    How many PCBs were manufactured? How many experience the issue? In other words, what is the rate of failure?