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LM5041: LM5041 application circuit

Kubendran G1
Intellectual 330 points
Part Number: LM5041
Other Parts Discussed in Thread: LM5101

Dear Sir,

We like to design  a circuit  specification of  3.3V 50A 300KHz buck converter frequency  based on your LM 5041 application circuit design.Please share details to below query.

1)Share error amplifier design of U4A and U4B  ? 

2)How to  calculate min overlapping period of  push pull converter  for current fed push pull topology?

Regards,

Kubendran  

  • 0
    TI__Genius 13660 points

    Hi Kubendran,

    1/. Sorry, actually I have no idea why it uses two amplifiers cascaded here, in my opinion, one amplifier is enough and can work well. And the engineer who designed this schematic is no longer in TI.   

    2/. Current-fed designs require a period of overlap to insure there is a continuous path for the buck inductor current. The magnitude of the overlap time can be calculated as follows:
    Overlap Time (ns) = (3.66 x RSET) + 7
    Overlap Time in ns, RSET connected to GND, RSET in kΩ
    Recommended RSET programming range: 10kΩ to 100kΩ

    Regards,

    Teng

  • 0 in reply to Teng Feng
    Intellectual 330 points

    Dear Teng,

    Thank you for your reply. How to we calculate output of U4A  and U4B error amplifier ? 

    Please share min overlapping time required for continuous path for buck inductor current ?

    Regards,

    Kubendran

  • 0 in reply to Kubendran G1
    TI__Genius 13660 points

    Hi Kubendran,

    U4A and U4B is working at open loop state, the output can be calculated with the gain of open loop (Avol).

    The requested minimum overlap time must be longer than the driver delay to ensure that the turn-off of switch is after the turn-off of switch.

    Regards,

    Teng

  • 0 in reply to Teng Feng
    Intellectual 330 points

    HI Teng,

    Please explain overlap time clearly.

    Normally Current fed or current mode type 2 compensation might be applicable. why did we used type 3 compensation?

    Any reason?

    Regards,

    Kubendran

  • 0 in reply to Kubendran G1
    TI__Genius 13660 points

    Hi Kubendran,

    As shown in below picture, the overlap time is used to ensure that the time  of point 1 happens after the time of point 2.

    I think current mode is very stable and easy to control. you can almost any compensation,  type 2 and type 3 are both OK.

    Regards,

    Teng

  • 0 in reply to Teng Feng
    Intellectual 330 points

    Hi Teng,

    Application spec: 3.3V/50A 300KHz. We are using 4 nos of BSZ096N10LS5 MOSFET and 3 nos of BSZ096N10LS5 MOSFET with respect to  LM5041 application circuit of Q1 and Q2. Buck driver IC  same as LM5041 application circuit. Gate resistance 5.1 Ohm. Driver IC bias 11V.   After applying driver IC bias supply with out applying VDS voltage ,found waveform abnormal. After that measured impedance between top side gate drive pin HS and HO ,showing 6 ohm. Driver IC input gate pulse from  LM5041 found ok. Please reply the cause of failure .

    Please find the attachment of failed driver gate pulse waveform

    Regards,

    Kubendran

    8228.Waveform.docx

  • 0 in reply to Kubendran G1
    Intellectual 330 points

    Hi Team,

    I am waiting for your reply.

    Regards,

    Kubendran

  • 0 in reply to Kubendran G1
    TI__Genius 13660 points

    Hi Kubendran,

    As you stated, the driver IC input gate pulse from  LM5041 found is normal, therefore it seems the issue appears at the driver circuit.

    I'd like confirmed again that if the driver IC is LM5101? and are the input signal HI and LI normal? and can you capture the waveform of driver IC bias supply? 

    Could you share the schematic with me, my email is teng-feng@ti.com                   

    Regards,

    Teng                                                       

  • 0 in reply to Teng Feng
    Intellectual 330 points

    Hi Teng,

    Thank you for your reply.I will share the detail.

    Regards,

    Kubendran.

  • 0 in reply to Kubendran G1
    TI__Genius 13660 points

    Hi Kubendran,

    As we are discussing on the email, I am closing this post now, thank you.

    Regards,

    Teng