Dear TI Team,
could you please help to clarify following question.
We would like to use the Ceramic Capacitor with Low ESR as output Capacitor for TPS76301-Q1 LDO (the ESR plot of the capacitor to use below).
According to datasheet the ESR of the output capacitor must be between 0.3 Ω and 10 Ω.
To meet the LDO output capacitor ESR requirements, the e.g. 1 Ω resistance should be added to the output capacitor in series.
Did I correctly understand that from the datasheet?
Does it important how resistor will be connected: - between the capacitor terminal and GND; - between the capacitor terminal and Vout LDO pin?
Thanks for help and looking forward to your answer.
Best Regards,
Igor Kuksin