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LM5045: Model behavior does not properly handle the connection of Vdd to Vcc.

David Fiori, Jr.
Prodigy 150 points
Part Number: LM5045

The data sheet of the L5045 provides for the connection of Vdd to Vcc to facilitate the use of an external regulator for high voltage. According to the data sheet a voltage greater than 10v should enable the operation of the IC when Vdd is connected to Vcc. Otherwise, the data sheet indicates that at least 14 volts need to be applied to Vdd when Vcc is not connected to Vdd. The PSpice model does not allow soft start to being charging with 10.5v applied to Vdd and Vdd when Vdd and Vcc are connected together, nor does it produce outputs including the function of the ramp connection. 

I would like to use this part for a requirement that provides a 12V-36V power source. According to the behavior of the PSPICE model this is not possible as, according to the PSPICE mode, at least 14V needs tp ne applied to Vdd for the IC to work while my application would require that it work with as little as 12V. My design at present provides for a low dropout voltage regulator which provides 10.5 volts to the circuit that connects Vdd to Vss. 

Please let me know if my design should work. Does the LM5045 part able to operate properly with as little as 10.5 volts applied to Vdd and Vcc when Vcc and Vdd are connected together even though it's Spice model does not operate under these conditions.

Also, I believe it should be very easy fix the model. Please let me know when the model is repaired.

Thank you very much,

David Fiori, Jr.

215-584-2214 (cell)

  • 0
    TI__Genius 13660 points

    Hi David,

    Yes, the device can opera by connecting the VIN and VCC pins together and supply a voltage greater than 10V.
    Could you check the UVLO pin voltage in your circuit whether it is greater than 1.25 V, when it is greater than 1.25 V,  then the soft-start capacitor is released and normal operation begins.

    Regards,

    Teng

  • 0 in reply to Teng Feng
    Prodigy 150 points

    Teng,

    Voltage at UVLO is 4.8847V when Vcc is connected to Vin and Vcc is supplied by a 10.623V Voltage Source in my simulation. The SS pin is outputting a constant 5.0588mV.  The only output with any sign of life is the Slope pin which does produce a sawtooth that peaks at 100mV at the correct oscillator frequency. In contrast the Ramp pin is not releasing either, it too is being held down. It is interesting that the Vref pin is producing a constant output voltage of 4.9731V.

    The fact that the slope pinis producing an output may be incorrect too. Is the Slope pin supposed to be operating if the SS pin hasn't reached it's turn on threshold yet? 

    Thank you for your prompt response on this.

    Sincerely Yours,

    David Fiori, Jr.

    215-584-2214 (cell)

  • 0 in reply to David Fiori, Jr.
    TI__Genius 13660 points

    Hi David,

    Could you share me the schematic and simulation file? Thank you.

  • 0 in reply to Teng Feng
    Prodigy 150 points

    Attached is the schematic I am using. Please feel free to call or email to discuss.

    Please note that the simulation works with Vin supplied with 24V, but there are no FET driver outputs when Vin is supplied with 10.6 Volts and Vin is connected to Vcc.LM5045 Prototype Schematic.pdf

  • 0 in reply to David Fiori, Jr.
    TI__Genius 13660 points

    Hi David,

    Sorry for the delay。

    First point, form your schematic, UVLO pin voltage should be 10.6 * 6.4 / (25+6.4)= 2.16V, I believe there is something different with your schematic.

    I didn't find other configuration problems, but Vin doesn't connect to VCC in the schematic, maybe the schematic is not completed.

    Regards,

    Teng

  • 0 in reply to Teng Feng
    Prodigy 150 points

    Teng,

    The schematic I sent was a schematic for a simulation that actually worked. Please note that the node labeled Vcc in the schematic comes from V4 which is shown at the top left hand side of the drawing. Vcc becomes 10.623 according to the PSpice ramp specification for voltage source in this schematic. The simulation works with the schematic shown works because Vdd becomes 24V. The problem I have is that the IC doesn't work when Vdd and Vcc are the same value of 10.623V. 

    Thank you for your continued help on this project.

    Sincerely Yours,

    David Fiori, Jr.

    215-584-2214 (cell)

  • 0 in reply to David Fiori, Jr.
    TI__Genius 13660 points

    Hi David,

    I didn't find other problems.

    If you don't mind, please share the simulation file to me at teng-feng@ti.com                           I can help run the simulation. 

    Regards,
    Teng