TPS2663: TPS2663

Hi Gilbert,

Welcome to E2E!

Unfortunately, the attachments are not working. Can you please attach the sheets again. 

Best Regards, Rakesh

Hello Rakesh,

thank you for replying. I do not know why the attachment is not working. Is there any special way to attach the file?   But what about my description? I just want to control the inrush current using the TPS26633 IC and the actual value of this insrush current is about 25A. Is it possible with the TPS26633 to regulate it at about 4.5 to 5A. is ti possible ? The the power condensators i would like to charge are 3 x 330UF. Is it possible to set the Inrush current higher than the nominal current of de device? 

On thwe link below you will find the calculation tools further down on the page as well as the simulation model. But i do not know how to use this model too. 

Please check and let me know 

BR

Gilbert

https://www.ti.com/product/TPS2663?keyMatch=TPS26633%20CALCULATION%20TOOL&tisearch=Search-EN-everything&usecase=part-number#design-development

TPS2663x _TPS1663x_Design_Calculator_revB.xlsx

Hi Gilbert,

The design sheet follows different calculation approach. 

Getting back to your hand calculations.. Do you have target startup time ? else lower inrush current with large Cdvdt capacitor (47nF or 100nF)  helps reduce stress on the device.

The device output current during startup will be the minimum value of the current limit setting and the inrush current setting. So, if you wish to continue with 3A inrush current, set current limit value above 3A. 

Do you have EVM at your hand for evaluation? 

Best Regards, Rakesh

Hello Rakesh,

Thank you for your replying.  I do not really have any defined startup time. I have tried to calculate the inrush current based on 47nF Capacitor. I can get a startup ime of about 24ms with an Inrish current of about 1A ( See the calculation below).

I do not really understand if you say: 

"The device output current during startup will be the minimum value of the current limit setting and the inrush current setting. "

Do you mean Iinrusch + Ilim = device output current ? 

I have  placed order for this avaluation Board : https://www.ti.com/tool/TPS26630-33EVM. But I also wanted to know, how to use the simulation model. 

Thank you in advance 

Best regards 

Gilbert

tdVdT = C(dVdT) * 20,8 *10^3 * Vin =  47nF * 20,8 *10^3 * 24V = 23,4ms

Berechnung vom Inrush Current mit 47nF : 

I(inrush) = C(out) * Vin/ tdVdT  = 3*330uF * 24V /23,4ms  = 1A. 

Hi Gilbert,

I mean the device output current  = min ( inrush current set due to dvdt cap , current limit setting).

For example here, the inrush current is 1A with 47nF dvdt capacitor. If the current limit is set to 0.5A then the device output current will be 0.5A only.

Please use the attached PSpice model for simulations 

SLVMD03.ZIP

Best Regards, Rakesh

Hello Rakesh,

Thank you for your last Email. Sorrry for my late answer, I was little busy meanwhile. I still have some questions regarding the Chip TPS26633. 

You spoke last time about the  the capacitor range to use on the dVdt pin (47nF ...100nF). So that means, the maximum Inrush currrent can only be about 1A as I caculated last time. What about if my device nominal current ist set at 2A for example?  doesn't I need to consider the device nominal current if calculating the Inrush current?

In the caculation sheet, I also do not understand why the device nominal current cannot be less than the Inrush current. 

What about the surge behavior. We are also scare about that the device can limit the surges and ESD pulses applied on the on it according to the EMC reqirements. I mean due to Ilim setting.

If I chose for example an Inrush corrent based on 100nF Capacitor (about 470mA) is there any issue if my device nominal current ist still set at 2A ? of course Ilim can be set higher.

Is the only disadvantage the start up time in this case?

My idea with the chip is to use the PGOOD output to switch off first the DCDC coverter , when charging the 3*330uF Capacitors and switch on after. So in this case i do not need to consider the device nominal current. What do ou think about it? 

Please let me know

BRGilbert

Hi Rakesh,

Thank you for your last reply. 

You said the chip will clamp the surge transient voltages applied on the device input Path. Are these transients not going to stress or damage the chip?  What about the overvolatage limiting feature when applyiing some Does also the overvoltage limiting feature reacts to the EMC surge transient? Is it possible to provide any measurements regarding these issues ( reaction of Current and overvoltage limiting features due to surge transients applied on it).

I would also like to understand the working principle of the chip to let the output voltage rise up  gradually. is there any basic schematic to explain it? 

I could not integrate the simulation model to my design. Is it possible to help for that goal? (only if it is easy for you)

Please let me know

BR

Gilbert