UCC39002EVM: UCC39002EVM:

Hello Paul,

You are correct. In a properly operating system the master( highest current module) sets the value of the load current and forces the other modules to follow this value.The master module will not adjust the out voltage so the voltage on the ADJ pin will be equal to the output voltage of the power module and will not change.

When you test with just one TDK module you should ensure :
(1) the other UCC39002 parts are powered off
(2) the  single TDK module is set up correctly for remote sensing .
The UCC39002 will only operate correctly with a power module that sources current.
Some power supplies have synchronous rectifiers on the output and these can source or sink current.

Do you know whether the TDK/Lambda PN PAH300S48-12 has synchronous rectification ?
You could try adding a diode on the 12V output and verifying the performance with and without the diode.

Also did you measure the resistance value between V+ and  S+ ?

The calculator attached shows how to calculate the values for the controller.

Also attached is a document that summarises the main issues in using the part.SLUC684.ZIPUCC29002_Reference.pdf

Regards

John

We are trying to apply the UCC39002 evaluation board (EVB) to two 12V modules and although the load was shared, we observed a significant degradation in the modules’ load regulation performance. Turning off one module resulted the same degradation. Further testing revealed, with one module off, that CSO and EAO were at ~100mV (at no load), and ADJ was drawing current. Our understanding is the master’s ADJ output should not draw current. With the other module off the behavior was the same.

From the EVB data sheet:

“In case the UCC39002 assumes the role of the master load share controller in the system or it is used in
conjunction with a stand-alone power module, the measured current signal on VCSO is approximately equal to the
VLS voltage. To avoid erroneous output voltage adjustment, the input of the error amplifier incorporates a typically
25-mV offset to ensure that the inverting input of the error amplifier is biased higher than the noninverting input.
Consequently, when the two signals are equal, there will be no adjustment made and the initial output voltage set
point is maintained.”

This behavior was repeated after replacing the UCC39002s and also using UCC29002s. Also reducing gain had not significant load regulation degradation.

The load regulation of the module is < 10mV for a 6A change.

Using the EVB the regulation is 86mV a > 10:1 degradation in the module’s load regulation.

Is this the expected performance of the EVB?

Can you suggest any application refinements?
The modules due not draw reverse current.

The V+ to S+ resistance is ~ 1600 Ohms.

Reviewing the suggested files and applying the calculator did not address the problem.

Is there a better IC?

Paul,

I dont quite follow your testing  and I dont know how to interpret your table of results.
The UCC39002 EVM was designed for three load modules.
If you are testing with two or one modules then you need to shutdown the unused controllers  with the SD1,SD2 or SD3 signals.
Did you do this ?

In order to check the accuracy of the load sharing then you should measure the current from each module for as many load set points as you require. This will allow you to check the accuracy of the load sharing function.
Measure Iout for each module at various loads. Then compute the Iout accuracy for each module..

Do you have a photo of your test setup ?

Regards

John

John,

Sorry for any confusion.

Our concern is not current sharing. We were able to have two 12 Volt power modules supplying approximately the same amount of current.

Our question is about voltage regulation at the load. We find that the voltage at the load rises about 86 mV from no load to full load (6 Amps). This is true for two modules or one.

In answer to your question, the unused module(s) was shutdown.

As I understand it, when only one module is used it becomes the “master”. Because it supplies all the current, there should be no error (Veao) and thus no current drawn through Radj by the Vadj pin. Is that the way the UCC29002 should perform because it is not what we are measuring?

Regards,

Paul,

Your power module is controlling the output voltage and to do this it measures the voltage on the senses lines  the S+ and S- .
If your output voltage changes when you load the output this is a measure of the load characteristic of the power supply.
Load regulation is defined as the defined as the change in output voltage from no load to full load divided by the noninal output voltage.
The UCC39002/UCC29002 does not control this.

R

John

We continue to have the problem where the UCC29002/29003 load sharing ICs degrading the controlled module’s load regulation performance. We attribute this to the Vadjust output current changing when,it should not, for example when in the master mode. This is shown in the following table where Veao, and therefore Vadj adjust current, changing. The same problem occurs when sharing the load using two channels.

When you state that the UCC29002 does not control the load regulation, do you mean UCC29002 will not affect the module’s load regulation characteristic? In other words the UCC29002 can be configured not to affect the module’s load regulation characteristic, while manipulating the module’s output, to achieve current sharing?

As can be seen from the following data we have not be able to achieve this. We need advice as to why.

The tabulated data was taken with one power supply module connected to one EVB channel. The remaining channels were disabled. The intent is to establish the master role.

COLUMN 1
The module’s voltage was measured at its output terminals.

COLUMN 2
The load voltage was measured where the remote sense is connected.
Please note that the load voltage, from 0 to 6A, changes 114mV. This is not due to the load regulation characteristic of the module. It is probably due to the 110mV change across Radj (See column 8)

COLUMN 3
The current was determined by a dynamic load.

COLUMN 4 is blank

COLUMNS 5-7
The voltages, at the UCC29002 pins, were measured with respect to -V.

COLUMN 8
The current was derived from the: (module output voltage – Vadj voltage)/100 (the Radj resistor is 100 Ohms).
As you have explained there should be no adjust current drawn when in the master mode.

Should a change in pin5 (Vadj) current, when in the master mode, be expected.--and if so to what degree?

Are there application issues that might cause this behavior?

Is there any application data available which includes load regulation?

As I explained the UCC29002/UCC39002 is a load share controller whose function is to accurately share load current between separate power sources.
If you are testing one power source and the output voltage variation over load is not acceptable then you have an issue with the power source.
The UCC29002/UCC39002 cannot improve the load regulation of your power source

Hi Paul,

Looks like the output voltage is changing from 11.997 to 12.111V over the load range which is about 0.85%, is this value falling outside of the system specification?

The load sharing systems are very sensitive to grounding and connection location for the load share controllers to the PSU's output ground in order to eliminate any potential voltage difference between the grounds.

It would be worth carefully checking the setup and ensuring there is no higher current paths that would lead to a voltage drop between the control circuit grounds.

Regards

Peter

Peter

Thanks for your response.

My attempt at posting a reply, on the 7/2, apparently failed.

To reiterate -- our problem is deterioration of the PSU's load regulation when load sharing (0.1% is needed). If only one PSU is active load regulation is a few millivolts. If both PSUs are active, load regulation is non-linear and ranges from 50 to 100mV depending on the value of the adjust resistor.

The EVM ties the PSUs plus outputs to the high side current sense and the positive remote sense is connected to the adjust resistors. Additionally the EVM ties the PSU negative outputs together. Our configuration ties the EVM's PSU outputs and the remote sense leads together at the load.  

Please advise as to the voltage drops we should be concerned with.

Hi Paul,

The biggest concern is that there are no voltage drops between the ground connections on the UCC39002 controllers.

0.1% is a very tight specification and I dont know if that will be realizable in a load share system. In a 12V system this 12mV of load regulation, given the additional connections and wiring to the EVM I would be surprised if the load regulation performance did not deteriorate compared to a single unit performance.

In other applications we have seen that the load share performance is sensitive to the grounding arrangements. You could try experimenting with various grounding arrangements on the secondary side to see if they bring any improvements.

Regards

Peter