UCC28780: ucc28780- RUN LEVEL AND XMFR RATIO

Hello Robin,

The signal RUN is not dependent on the bulk voltage to go up. It IS dependent on the bulk voltage to STAY up. RUN is an internal signal that gates several functions to prepare for and allow switching to proceed. It is a “go-ahead” signal. It is brought out to a pin because it can be useful for other purposes, but right now, that is beside the issue. As described in step #4 of the start-up sequence of Section 7.4.8 of the datasheet, RUN will go high (and allow switching to proceed) PROVIDED that no fault events have been detected to prevent that.   Such fault events are described in Table 3 (page 35) which are any fault that does not require switching (which has not happened yet) to detect.

Provided that no non-switching faults have been detected, the controller allows RUN to go high and proceeds to steps 5 and 6 of the sequence.  At step 6, the first PWML pulses are driven and Ivsl is sampled to determine if the bulk voltage is high enough to continue to switch. Here, I concede that the sequence description is missing this information.   The sampling is described in Section 7.4.10.1 in the second paragraph. If the input voltage is lower than programmed for start-up, Ivsl will not meet the Ivsl(run) threshold and switching will stop, RUN will go low and VDD will drain down to UVLO-off and cycle up again to try again indefinitely until Vbulk (based AC input) is finally high enough to meet the start-up criteria.

Note that the controller cannot know what Vbulk is unless PWML drives the low-side switch and Ivsl can be sampled at VS. It only switches a few times at small duty cycle to check. If it passes the Ivsl(run) threshold, RUN stays high and the remainder of the start-up sequence continues. If it doesn’t pass, RUN goes low, VDD falls, and the whole sequence starts over again.  Also, once it does pass Ivsl(run) threshold (brown-in) to keep going, the criterion for RUN changes: now on each subsequent cycle Ivsl is sampled to make sure that it remains > Ivsl(stop) threshold (brown-out).  If Ivsl < Ivsl(stop) continuously for longer than 60ms, a brown-out shutdown commences. When operating in the low bulk voltage ripple valleys at high load, Ivsl will be lower than the stop threshold, but each line peak will bring it back above Ivsl(stop) to reset the 60ms timer.   This is described in the third paragraph of Section 7.4.10.1 and Figure 31.

Once you get any RUN high at all, the potential faults in Table 2 apply and any of them can shut RUN down (provided the “Delay to Action” is met).  But at very low input voltages, if RUN made it high, “CS pin short” of Table 3 is the first most likely fault to be encountered. You only get one PWML pulse on this one. Once input (and Vbulk) gets high enough (past the “CS pin short” issue) the next likely fault will be “Brown-in detection” of Table 2. Once the input is high enough to meet your programmed brown-in threshold, you should expect continued PWML switching (plus PWMH after sampled Vvs > 0.28V) until to output is charged up to the Vout regulation target, or some other fault in Table 2 is detected. Common “other faults” that abort start-up are “output OVP” and “VDD UVLO”. OVP can happen as Vout approaches or gets to regulation because the VS divider is set too close to the OVP threshold, or a poor loop compensation design results in a high overshoot, or the feedback loop is open somehow (bad connection, missing part, etc.). VDD UVLO can happen if the VDD cap runs out of charge faster than the reflected output voltage can rise high enough to sustain VDD through the Aux winding.

From your 09-09-2020 schematic, Rvs1 = 60.4K (your R6) and you mentioned that Npa = 28/3. Ivsl(run) = 365uA, so in order to start-up and keep running, Vbulk must be > 365uA*60.4K*(28/3) = 205Vdc. To keep running at ~100Vdc, you’d have to cut Rvs1 in half, but with a high primary inductance, you probably won’t make it past the “CS pin short” test. That is where adding an offset voltage to the CS pin might help (your CS pullup R?), temporarily for low-voltage power-up test purposes only. But the offset has to be lower than 0.28V to get any useful peak current each cycle. You can monitor the CS pin to see how much offset is needed for the current ramp to reach 0.28V within the allowed 2-us window, at the test voltage that you want to start-up at.

For first power-up, I suggest to set a light resistive load of about 5~10% of full power.

Once you successfully start-up and Vout reaches regulation, it should keep switching going to avoid encountering any unexpected issues at no-load. You can then raise input voltage to see how operation goes and bring it significantly above your expected programmed start-up threshold. When satisfied with higher voltage operation, you can restore R6 to 60.4K, remove the CS offset and confidently apply the higher brown-in voltage to start up and evaluate the rest of the operation line/load ranges.

Regards,

Ulrich