• State Resolved
  • Locked Locked
  • Replies 5 replies
  • Answers 2 answers
  • Subscribers 63 subscribers
  • Views 579 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Original question:

LM3489: asking for the 20V drop spec

LM3489: Vout ripple is large with no load

Mike Yu
Intellectual 2320 points
Part Number: LM3489
Other Parts Discussed in Thread: TPS65987DDJ, , TPS65987

Hi Team,

 

The customer reports that the vout ripple is large with no load. Their schematic is as same as TPS65987DDJ EVM, including the surrounding component. The only different is that there is no LED on the customer system board.

https://www.ti.com/lit/ug/slvubo9a/slvubo9a.pdf?ts=1608032532260&ref_url=https%253A%252F%252Fwww.ti.com%252Ftool%252FTPS65987EVM

 

Below is the output ripple comparison between the customer board and EVM. The ripple on the EVM is much smaller than the customer, which might because of there is 0.5mA of load on the EVM(LED).

 

Zoom in the waveform on the customer, the Pgate turns off once the FB pin reach 10mV.

However, the FB pin is still increasing. Is that because the inductor charging the output cap?

Please kindly provide the suggestion to decrease the output ripple. Thank you.

Best regards,

Mike

  • 0
    TI__Mastermind 22301 points

    Hi Mike,

    Do the output capacitors have the ESR as recommended in schematic?

    Capacitor voltage is out-of-phase with its ripple current, whereas the voltage drop due to ESR would be in-phase with the ripple current.

    If there is not enough capacitor ESR, the phase-lag of the capacitor voltage can cause PGATE to stay on longer than intended and lead to larger output ripple.

    Otherwise I do think having some small output current will also help with regulation.

    -Orlando

  • 0 in reply to Orlando Murray
    TI__Intellectual 2320 points

    Hi Orlando,

    Thanks for your reply, I had done another test on the customer board.

    The reason of high output ripple might be the rising time of Vfb too slow. The PMOS turns on about 2.95us, then IL rise up to 4.8A.

    Even the PMOS turns off, Vout keeps rising, because the output caps are charged by the inductor.

    Once I remove the 1nF cap between FB pin and Gnd, the rising time of Vfb increase and the Vg turn on time decrease.

    Also, the vout ripple drop to 5.2mV. Please reference the waveform below.

    As I know, C58 cap is used for filter noise on the Vfb. Is there any concern to remove the cap between FB pin and gnd? 

    Or what is the minimum value of this cap? Thank you.

    Best regards,

    Mike

  • 0 in reply to Mike Yu
    TI__Intellectual 2320 points

    Hi Orlando,

    I also found out that there is no capacitor between FB pin and gnd. It seems that we didn't need that capacitor, right?

    Best regards,

    Mike

  • 0 in reply to Mike Yu
    TI__Mastermind 22301 points

    Mike, 

    FB capacitance will slow down response of FB node, we usually do not place capacitors on FB node for LM3489.

    Looks like the TPS65987 team placed it there to smoothen the transition between output voltages set by different MOSFETs.

    As long as your output voltage transitions are good then you do not need the FB capacitor.

    If you have overshoot / current limit issues when switching VOUT then you should use a FB capacitor. Try a smaller value capacitor like 22-100pF. 

    Hope this helps,

    -Orlando

  • 0 in reply to Orlando Murray
    TI__Intellectual 2320 points

    Hi Orlando,

    Get it, thanks for your help.

    Best regards,

    Mike