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UCD90160A: UCD90160A WDT Usage

Fang Frank
Prodigy 80 points
Part Number: UCD90160A

UCD90160A is used on our production, we haven’t enabled Watchdog Timer(WDT) of the part, right now we’d like to enable the WDT without hardware changes( the card has been released to production).

Our expectation is:

                1. After enable the WDT, we like to map the WDO (Watchdog output) to PMON_PORST_N_PT, see the schematics below and Fusion Digital Power Designer configuration below, PMON_PORST_N_PT is already used as card power on reset according POL power good, we’d like add one more control WDO to PMON_PORST_N_PT, but I can’t find out the configuration option from Fusion Digital Power Designer, does UCD90160A support it? and how to configure?

                2. or a power supply re-sequence after watch dog time out, I haven’t found the configuration from Fusion Digital Power Designer, does UCD90160A support it? and how to configure?

See the attached doc for the schematic and UCD90160A configuration.

Thanks

FrankQuestion about UCD90160A WDT Usage.docx

  • 0
    TI__Guru 65610 points

    Hello

    #1. yes, you can add the event into the logic GPO. Please refer the below snapshot

    #2. The system watchdog event can not be used for resequencing internally. This signal must be wired back as input to resequencing.

    Regards

    Yihe

  • 0 in reply to yihe
    Prodigy 80 points

    Hi Yih

    Thanks you reply.

    After enable the system watchdog, and add the WDT event to PMON_PORST_N, then the WDT time out will triger PMON_PORST_N as what we expected. See the configuration in attached doc The signal PMON_PORST_N is a power on reset for the whole system, the system could not bootup with max reset period 32,256ms that UCD90106A allows. So the system software is keeping under reboot. Software like have 300s before issue SYSTEM_WATCHDOG_RESET command.

    What’s the possible solution? I’ve tried some experiments to use system reset, but it doesn’t work. For the detail configurations and test results, see the attached doc.

    Thanks

    FrankQuestion about UCD90160A WDT Usage_Second.docx

     

     

     

     

  • 0 in reply to Fang Frank
    TI__Guru 65610 points

    Hello

    The start time of the watchdog will be applied only under below two conditions:

    1. It is the first time boot up and device will wait the start time to monitor the signal

    2. watch reset pin function is enable and reset pin is de-asserted.

    As for the SYSTEM_WATCHDOG_TIMEOUT EVENT, if the device has detected a timeout on the watchdog, this event stays until the input is toggled or a command is received.  It means that the PMON_PORST_N output maintain the same output as TIMEOUT .

    Regards

    Yihe

  • 0 in reply to yihe
    Prodigy 80 points

    HI Yihe

    In that case, we can't use SYSTEM_WATCHDOG_TIMEOUT EVENT for card power on reset, after WDT timeout, the card will be under RESET, the card(CPU or other parts are under reset) can't issue SYSTEM_WATCHDOG_RESET commands to UCD90160A, the card will be hung there until a power cycle. Is that correct?

    Happy New Year

    Frank

  • 0 in reply to Fang Frank
    TI__Guru 65610 points

    Hello

    is your reset signal edge-triggered or level trigger? if it is level trigger, the watchdog event may not fit you need since it keep the output LOW.. But if it is edge triggered, it shall not matte.

    How does your reset signal work before watchdog is added?

    Regards

    Yihe

  • 0 in reply to yihe
    TI__Guru 65610 points

    Hello

    We haven't heard from you for a while and assumed that the issue has been solved. Please reply if any further help is needed.

    Regards

    Yihe