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UCC28780: Power for upper FET

Part Number: UCC28780

I have a custom board based on the UCC28780 reference design. I don't think the upper FET (Q2) is closing. The power supply regulates well under light load up through about 1.2 A. It's supposed to handle up to 2 A out, but it fails if I draw around 1.3 or 1.4 A. I think that's when it transitions from ABM to AAM. I'm attaching my schematic, as well as fab and assembly drawing. I'm also attaching the spreadsheet I used to compute the values. The schematic is "Rev 2" and should match any rework I've done on the Rev 1 board. I can provide raw Altium files, gerbers, etc, if required.

There are two scope captures included in the zip. They were taken with the power supply under a load of 0.6 A. CH1 is the net PWR_VSW; CH2 is either QH_VCC or QH_VDD; CH3 is PWR_PWMH; CH4 is PWR_PWML; MATH is CH2-CH1. The VCC trace (power into the NV6117) looks reasonable. On the other hand, the VDD trace looks terrible. It should be a steady 6.2 V, but it seems to collapse immediately. Have you seen this type of behavior before? Any pointers of where to investigate further, or experiments to run, is appreciated. Thanks!

Pedal_Power.zip

  • Hi, Jason

    I've assigned  your post to expert, pls expect a response by Thursday.

    Yunsheng

  • Hi Jason,

    Thanks for your interesting in TI part.

    Here are some questions and suggestions for you :

    1. Based on the waveforms you provided , the high side FET didn't turn on . since the CH2 scale used 50v/div, and don't know what is the ground it refer to . so the waveform don't tell me what is the exactly voltage for QH_VCC and QH_VDD. but i guess  your high side GaN or isolator driver is UVLO .

    2. May i ask what the purpose of D15 and D16 which in series in the high side bootstrap path?  can you remove it ?

    3. If you output voltage is a fixed 9V . the turns ratio should be revised , Ns= 4T , Na =9T is enough to supply both ucc28780 and GaN FET . while 13T will results in Vaux up to ~29.25V which is very close to maximum allowed voltage for GaN FET VCC . 

    4. I believe your high side GaN or isolator driver is UVLO , try to correct it . 

    Thanks.

  • Hi Jaden,

    1. All waveforms are referenced to PGND. Power applied is 160 VDC limited to 250 mA, at J1. 

    2. D15 and D16 are there to drop the voltage coming out of D2 down below the maximum voltage rating of Q2. They are just dead-bugged in for now, and easy to remove. I installed them because on previous tests, I saw that QH_VCC - PWR_VSW was exceeding 30 V, which is the abs max for the NV6117.

    3. I can reconfigure to use the 9T supply. I'll try that and see what happens.

    4. I agree that it looks like QH_VDD and PWR_VCC2 are low relative to PWR_VSW. What's odd is that QH_VCC - PWR_VSW is consistently above 12 V, which should more than enough to power QH_VDD. It seems like something is drawing too much current maybe. When I used my multimeter to measure the resistance of QH_VDD to PWR_VSW, I got results of several MOhm, so I don't think it's a shorted pin or anything like that.

  • Hi Jason,

    Please try the solutions I had proposed . and capture the QH_VDD and PWR_VCC2 by differential prober to see what the exactly voltage. Thanks. 

  • Hi Jaden,

    I have resolved the issue. I did a sanity check of components to look for any cold solder joints, etc. During that sweep, I found that the series resistor (R8) for the high FET (NV6117) wasn't reading 10 Ohm, but instead an open circuit. I replaced the resistor and everything is working now. The waveforms look good and confirm the high side FET is working. I'm able to pull max power with my load.

    I have also reconfigured the transformer to use the aux winding you suggested. Based on my math, it's actually 8 turns. I get just under 18 V out, which is the best option for this transformer.

    Thanks for all the help!