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LP5036: LP5036 I2C NACK

Part Number: LP5036

Hi Team,

We have a problem on LP5036 I2C communication. The LP5036 will occur NACK when after re-power on. As I know, the device will reset when EN from low to high. But why EC cannot write register of LP5036?

The EC command is as below.

1. 0x38[7-0]: FFh

2. 0x00: Chip_EN = 1

3. 0x02: FFh

Best regards,

Hardy

  • Hi Hardy,

    Could please help to solve my confusion firstly?

    Do you means that the following steps couldn't operate successfully after repower on the LP5036?

    1. write FFh to address 0x38
    2. write 1 to chip_en bit on address 0x00
    3. write FFh to address 0x02

    if it is right, could you please provide the write commend and read commend waveform?

    Best Regard

    Monet Xu

  • Hi Monet,

    Yes, your description is right. I will ask for customer to provide the write commend and read commend waveform. By the way, do we have sample code that can be provided to customers for reference?

    1. write FFh to address 0x38
    2. write 1 to chip_en bit on address 0x00
    3. write FFh to address 0x02

    Best regards,

    Hardy

  • Hi Hardy,

    Please suggest customer that send the address of chip first after repower on. in addition waiting for your waveform.

    Could you please check with customer which MCU and Compilation platform do they use?

    Best Regard

    Monet Xu

  • Hi Monet,

    They send data to 0x1C address of chip.

    Best regards,

    Hardy

  • If there is no further question, we will close this thread.