HI Board designers, 

Refer below, FAQs, common queries and replies

[FAQ] List of FAQs for TPS6594-Q1, TPS6593-Q1, LP8764-Q1 PMICs

https://e2e.ti.com/support/power-management-group/power-management/f/power-management-forum/1372241/faq-list-of-faqs-for-tps6594-q1-tps6593-q1-lp8764-q1-pmics?tisearch=e2e-sitesearch&keymatch=tps6593#

AM62A7: Changing the VDD_CORE voltage 

If you are using the SK-AM62A-LP EVM with the TPS65931211-Q1 PMIC, then you can modify the hardware to change the default voltage on VDD_CORE which is supplied by the PMIC multi-phase Buck1/2/3.

The GPIO6 of the PMIC was configured to set the voltage on Buck1/2/3 with the following polarity:

• High: Buck1/2/3 = 0.85V
• Low: Buck1/2/3 = 0.75V

During power up, the PFSM for the '1211 reads the state of GPIO6 10ms after it has enabled the 3.3V load switch. If GPIO6 is pulled up to that signal, BUCK123 will be 0.85V.

Therefore, from the PMIC perspective Pull GPIO6 HIGH to the 3.3V load switch signal

This information along with all the PMIC NVM configuration was documented in the following user's guide: https://www.ti.com/lit/pdf/slvucm3

Regards,

Sreenivasa