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[FAQ] AM625 / AM623 / AM620-Q1 / AM62Ax / AM62D-Q1 / AM62Px / AM64x / AM243x (ALV, ALX) Design Recommendations / Custom board hardware design – VMON Power OK (POK) Module Voltages Monitored and Connection recommendations

Kallikuppa Sreenivasa
Guru**** 199059 points
Part Number: AM620
Other Parts Discussed in Thread: AM625, AM62P

Tool/software:

HI TI experts,

I have queries related to the POK modules for AM6x family of processors 

Supported voltage monitors 

Voltage monitors that required external voltage connection and connection recommendations 

Voltage monitor connection recommendation when not used 

  • 0
    TI__Guru**** 199059 points

    HI Board designers, 

    Please refer below.

    Supported Voltage monitors supported:

    AM64x

    AM243x (ALV/ALX)

    AM625

    AM62A

    AM62P

    Connection recommendations when used

    VMON_VSYS

    Follow System Power Supply Monitor Design Guidelines section of processor specific data sheet. 

    VMON_1P8_SOC
    VMON_3P3_SOC

    VMON_1P8_MCU
    VMON_3P3_MCU

    Connect the relevant supply directly to the pins without filter capacitor.

    Connection recommendations when not used

    AM64x

    Rev G schematics 

    The next revision of the data sheet will have the below updates

    AM243x

    The recommendations are similar to Am64x

    AM625 Rev B data sheet recommendations

    AM62x and AM62Ax have a similar requirement. This will be updated in the next revision of the data sheet.

    AM62A

    AM62P

    Refer to the processor specific data sheet and TRM for the required information.

    FAQ reference for queries related to caps on VMON pins: 

    (+) AM2434: VMON_1P8_SOC, VMON_3P3_SOC pin, blocking cap? - Arm-based microcontrollers forum - Arm-based microcontrollers - TI E2E support forums

    VMON_1P8_SOC, VMON_3P3_SOC

    VMON_1P8_MCU, VMON_3P3_MCU

    We do not recommend a decap. This is the supply seen by the device internally. This depends on the power supply quality and customer can decide the implementation based on the supply monitor inputs routing .

    For the VMON_VSYS a filter cap is recommended at the VMON_VSYS input pin of the SOC.

    Data sheet reference 

    System Power Supply Monitor Design Guidelines

    Regards,

    Sreenivasa

  • 0 in reply to Kallikuppa Sreenivasa
    TI__Guru**** 199059 points

    Hi Board Designers,

    Inputs related to Power OK (POK) Modules during the power-up sequence

    (+) AM6442: Power OK (POK) Modules during the power-up sequence - Processors forum - Processors - TI E2E support forums

    The TRIM is performed by TI during the component manufacturing process in order to calibrate the POKs  ?

    This is correct, these values are set on the device via efuse.
    - HW tie-offs are the base configuration of the silicon, and in some cases, they can be modified by eFUSE?
    This is set as part of silicon design to a fixed value. It is not modifiable via efuse. 

    I am still awaiting feedback on default states of POKs and if there is any monitoring during power up. 

    I did receive confirmation that the default state of the POK will be disabled and there is no supply monitoring during power up. 

    The POKs have to be enabled and the interrupt/ESM event configured to trigger HW action. 

    Regards,

    Sreenivasa