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AM623: about am623 MCASP2 issue when config MCASP2 as i2s master

Part Number: AM623
Other Parts Discussed in Thread: TAC5111

Tool/software:

hi 

when configure am623 MCASP2  as i2s master , I use the following record command ,it will report error. please help check why

Warning: rate is not accurate (requested = 48000Hz, got = 44100H[ 598.784554] davinci-mcasp 2b20000.audio-controller: Too fast reference clock (96000000)
z)
please, try the plug plugin
[ 598.793924] davinci-mcasp 2b20000.audio-controller: Sample-rate is off by 400 PPM

best regards

  • below is the device tree:

    main_mcasp2_pins_default: main-mcasp2-default-pins {
    pinctrl-single,pins = <
    AM62X_IOPAD(0x178, PIN_OUTPUT, 2) /* (AC20) MCASP2_ACLKX */
    AM62X_IOPAD(0x174, PIN_OUTPUT, 2) /* (AD21) MCASP2_AFSX */
    AM62X_IOPAD(0x18c, PIN_OUTPUT, 2) /* (AC21) MCASP2_AXR0 */
    AM62X_IOPAD(0x094, PIN_INPUT, 3) /* (N20) MCASP2_AXR12 */
    >;
    };

    &mcasp2 {
    status = "okay";
    #sound-dai-cells = <0>;

    pinctrl-names = "default";
    pinctrl-0 = <&main_mcasp2_pins_default>;

    op-mode = <0>; /* MCASP_IIS_MODE */
    tdm-slots = <2>;

    serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
    1 0 0 0
    0 0 0 0
    0 0 0 0
    2 0 0 0
    >;
    tx-num-evt = <0>;
    rx-num-evt = <0>;
    };

    codec_audio: sound {
    compatible = "simple-audio-card";
    simple-audio-card,name = "otis-sound";
    simple-audio-card,format = "i2s";
    simple-audio-card,bitclock-master = <&sndcpu>;
    simple-audio-card,frame-master = <&sndcpu>;
    //simple-audio-card,bitclock-inversion;

    sndcpu: simple-audio-card,cpu {
    sound-dai = <&mcasp2>;
    };

    sound_master: simple-audio-card,codec {
    sound-dai = <&tac5111>;
    };

    };

  • We use the LINUX SDK 10.01.10.04

  • Hi Bert,

    If you are using MCASP as master,

    Add system-clock-direction-out; on the DTS file. 

    Also, would record work with 44.1KHz instead of 48KHz. Can you also look at the below thread:

    https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1271393/am623-mcasp-i2s-master

    Best Regards,

    Suren

  • hi  Suren

    thanks for you response. Now I found another question, when I use the arecord command to capture audio data, it can only got the sample rate 88200 whatever I set it , below picture is log, please help check the reason, thanks very much  

  • Hi Bert,

    Are you seeing correct BLCK and WCLK on your setup? What are the expected values for these? It looks to be some clocking issue.

    Best Regards,

    Suren

  • Hi Suren

       from am623 TRM, when configure am623 MCASP2  as i2s master, the AUXCLK is the source clock to generate AHCLKX and ACLKX.   I use the k3conf tools to check the AUXCLK , it is  96000000.   Is any method to change the AUXCLK  value ? 

  • Hi Bert, 

    I am on travel this week, so my responses will be delayed. 

    Please take a look at the below thread that I helped customer understading the AUXCLK and how these need to be included in the device tree.

    https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1519789/am623-sk-am62b-p1-mcasp-issue

    Let me know if you can add the assigned-clock-rates params in the device tree and set the assigned-clock-rates(Whatever BCLK you are expecting it on your setup).

    Best Regards,

    Suren

  • Hi Suren 

      I think I already understand the AUXCLK , from the Clock tree,  AUXCLK  can only choose from hsdiv8 100Mhz or hsdiv6 96Mhz, right?   I change the mcasp2 device tree  assigned-clock-parents  and it take effect 

  • we want to use sample rate 8k HZ and BCLK  256k HZ,  when set AUXCLK  to 100Mhz or 96Mhz,  sample rate  and BCLK still inaccuracy.  Do you have any suggestion to generate accurate clock when configure am623 MCASP2  as i2s master? 

  • Hi Bert,

    If you are using MCASP as master, then you will also have to add 

    For example like these below on the DTS file based on your clock values that you are intending to use.

    system-clock-frequency = <24576000>;
    system-clock-direction-out;

    assigned-clock-rates=<24576000>;

    Please share your DTS file after adding these variables along with assigned-clocks, assigned-clock-parents and let us know if it works.

    Best Regards,

    Suren

  • hi Suren 

    below is my DTS about sound

    mcasp2: audio-controller@2b20000 {
    compatible = "ti,am33xx-mcasp-audio";
    reg = <0x00 0x02b20000 0x00 0x2000>,
    <0x00 0x02b28000 0x00 0x400>;
    reg-names = "mpu", "dat";
    interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>,
    <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>;
    interrupt-names = "tx", "rx";

    dmas = <&main_bcdma 0 0xc502 0>, <&main_bcdma 0 0x4502 0>;
    dma-names = "tx", "rx";

    clocks = <&k3_clks 192 0>;
    clock-names = "fck";
    assigned-clocks = <&k3_clks 192 0>;
    assigned-clock-parents = <&k3_clks 192 2>;
    assigned-clock-rates=<24576000>;
    power-domains = <&k3_pds 192 TI_SCI_PD_EXCLUSIVE>;
    status = "disabled";
    };

    codec_audio: sound {
    compatible = "simple-audio-card";
    simple-audio-card,name = "otis-sound";
    simple-audio-card,format = "i2s";
    simple-audio-card,bitclock-master = <&sndcpu>;
    simple-audio-card,frame-master = <&sndcpu>;

    sndcpu: simple-audio-card,cpu {
    sound-dai = <&mcasp2>;
    system-clock-frequency = <24576000>;
    system-clock-direction-out;
    };

    sound_master: simple-audio-card,codec {
    sound-dai = <&tac5111>;
    };

    };

    after add assigned-clock-rates=<24576000> to MCASP2 node, I use k3conf to check AUXCLK, it is 24615384, not 24576000. please help check

  • Hi Bert,

    Could you try changing the frequency to another value as the dividers inside the SoC are integer dividers only, not sure dividing 100MHz/96Mhz (Parent clocks for AUXCLK) in order to achieve the 24576000 is correctly divisible. 

    But with the existing setup, are you able to play something out on to the codec?

    Best Regards,

    Suren

  • Could you try changing the frequency to another value as the dividers inside the SoC are integer dividers only, not sure dividing 100MHz/96Mhz (Parent clocks for AUXCLK) in order to achieve the 24576000 is correctly divisible. 

       below dts still can not achieve the 24576000 

     assigned-clock-parents = <&k3_clks 192 1>;
    assigned-clock-rates=<24576000>;

    But with the existing setup, are you able to play something out on to the codec?

       yes,