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PROCESSOR-SDK-AM64X: GPIO1 device fails to initialize with error "IRQ index 2 not found"

Part Number: PROCESSOR-SDK-AM64X

I am working with the AM64x-GP-EVM eval board.

I have been successfully using the board for a few weeks with my own Arago-built kernel.

I am now trying to work with the GPIO pins.  What I am finding is that the GPIO1 module is not initializing properly.  I have spent hours sleuthing the device tree, the source code for the davinci-gpio driver, trying out different device tree tweaks, and so on.  I can't find anything wrong.

The symptom is that, during boot, the GPIO1 module fails to initialize, with this error in dmesg:

[ 2.402358] davinci_gpio 601000.gpio: IRQ index 2 not found
[ 2.408034] davinci_gpio 601000.gpio: IRQ not populated, err = -6

And if you look at the contents of /sys/devices/platform/bus@f4000 for the two devices, GPIO0 looks normal, but GPIO1 does not:

root@am64xx-evm:/sys/devices/platform/bus@f4000# ls 600000.gpio/
driver driver_override gpio gpiochip1 modalias of_node power subsystem uevent


root@am64xx-evm:/sys/devices/platform/bus@f4000# ls 601000.gpio/
driver_override modalias of_node power subsystem uevent

I've dug into the device tree, into the tech ref (Tables 9-79, 9-86) to look at interrupt numbers, all sorts of things like that.  I cannot find anything wrong.

I did dig far enough to learn that, down in the device driver, the failure is occurring when the call to platform_get_irq(pdev, num) fails on num=2.  (Out of a range of 0..5, representing the six GPIO banked IRQ's which get mapped by GPIOMUX_INTRTR0 through to GICSS0 SPI inputs.)

I started to try to dig deeper to figure out where the pdev is getting populated with values, but presumably that's from the device tree, which looks fine.

Here is the relevant part of k3-am64-main.dsti.  I've dug deep into the bindings documentation for both the GPIO device and the interrupt controller, and it all looks fine to me.  There are no other devices 

main_gpio_intr: interrupt-controller0 {
  compatible = "ti,sci-intr";
  ti,intr-trigger-type = <1>;
  interrupt-controller;
  #interrupt-cells = <1>;
  ti,sci = <&dmsc>;
  ti,sci-dev-id = <3>;
  ti,interrupt-ranges = <0 32 16>;
};

main_gpio0: gpio@600000 {
  compatible = "ti,am64-gpio", "ti,keystone-gpio";
  reg = <0x0 0x00600000 0x0 0x100>;
  gpio-controller;
  #gpio-cells = <2>;
  interrupt-parent = <&main_gpio_intr>;
  interrupts = <190>, <191>, <192>,
               <193>, <194>, <195>;
  interrupt-controller;
  #interrupt-cells = <2>;
  ti,ngpio = <87>;
  ti,davinci-gpio-unbanked = <0>;
  power-domains = <&k3_pds 77 TI_SCI_PD_EXCLUSIVE>;
  clocks = <&k3_clks 77 0>;
  clock-names = "gpio";
};

main_gpio1: gpio@601000 {
  compatible = "ti,am64-gpio", "ti,keystone-gpio";
  reg = <0x0 0x00601000 0x0 0x100>;
  gpio-controller;
  #gpio-cells = <2>;
  interrupt-parent = <&main_gpio_intr>;
  interrupts = <180>, <181>, <182>,
               <183>, <184>, <185>;
  interrupt-controller;
  #interrupt-cells = <2>;
  ti,ngpio = <88>;
  ti,davinci-gpio-unbanked = <0>;
  power-domains = <&k3_pds 78 TI_SCI_PD_EXCLUSIVE>;
  clocks = <&k3_clks 78 0>;
  clock-names = "gpio";
};

The only thing I've found that's not completely symmetric about the way the devices are declared in shift line in the declaration of cbass_main in k3-am64.dtsi.  Rather than declaring two devices of size 0x100 at 0x600000 and 0x601000, it appears to simply "lazily" cram them into a single large range declaration.  So if there actually were something meaningful for GPIO0 in the range 0x600100-0x600FFF, then GPIO1 would not be picking up the same stuff starting at 0x601100.

ranges = <0x00 0x000f4000 0x00 0x000f4000 0x00 0x000002e4>, /* PINCTRL */
         <0x00 0x00600000 0x00 0x00600000 0x00 0x00001100>, /* GPIO */
         <0x00 0x00a40000 0x00 0x00a40000 0x00 0x00000800>, /* Timesync router */

Note that I don't actually use any of the GPIO1 interrupts - I just want to do reads and writes.  But the interrupt stuff is causing it to not initialize.

For the moment, for my initial tests, I am working around this by using one of the mere *two* GPIOs on GPIO0 that are not allocated for special functions on the EVM board.  But we'd really like to be able to use the rest of the device, of course.

Thanks for any tips,

Brad

  • Hi Brad,

    Which version of the Processor SDK release do you use?

    Please provide the output of command 'uname -a' on your linux console?

  • Hi Bin,

    I installed processor_sdk_sitara_am64x_linux_07_02_00_01-linux-x64-installer.run

    That said, I'm not exactly using the SDK per se. I am using a setup based on TI's Arago, dunfell version. I actually have two trees on my disk, "processor_sdk_sitara_am64x_linux_07_02_00_01", and "tisdk", which I got from the Arago archives and set up via:

    git clone git://arago-project.org/git/projects/oe-layersetup.git tisdk
    cd tisdk
    ./oe-layertool-setup.sh -f configs/coresdk/coresdk-07.02.00.004-config.txt

    So that appears to be the same version of the SDK but sourced from the Arago project.


    I'm running Ubuntu 20.04 under WSL2:
    brad@brad-Dell:~$ uname -a
    Linux brad-Dell 5.4.72-microsoft-standard-WSL2 #1 SMP Wed Oct 28 23:40:43 UTC 2020 x86_64 x86_64 x86_64 GNU/Linux

    Thanks,
    Brad

  • Two more notes that I should make you aware of:

    1. Note that I've been working with the Arago device tree in Arago's folder build/arago-tmp-external-arm-glibc/work-shared/am64xx-evm/kernel-source/arch/arm64/boot/dts/ti.

    It appears to be the same as the device tree stuff in processor_sdk_sitara_am64x_linux_07_02_00_01/board-support/linux-5.4.91+gitAUTOINC+4f9a563c39-g1af1264b70/arch/arm64/boot/dts/ti, but I haven't verified line by line.

    2. I don't think this should affect anything, but I've modified the stock device tree in order to add M_CAN support, following the AM654 example and modifying appropriately.  (I have to say, I would have much preferred if TI shipped a device tree, or at least overlays, that supported the various hardware elements on the eval board.  This took a lot of time to get right. Hopefully it can help someone else.)  The specific additions I made are as follows:

    In k3-am642-evm.dts, I added this to the &main_pmx0 section:

    mcan1_pins_default: mcan1_pins_default {
       pinctrl-single,pins = <
          AM64X_IOPAD(0x025c, PIN_INPUT, 0) /* (D17) MCAN1_RX */
          AM64X_IOPAD(0x0258, PIN_OUTPUT, 0) /* (C17) MCAN1_TX */
       >;
    };
    mcan0_pins_default: mcan0_pins_default {
       pinctrl-single,pins = <
          AM64X_IOPAD(0x0254, PIN_INPUT, 0) /* (B17) MCAN0_RX */
          AM64X_IOPAD(0x0250, PIN_OUTPUT, 0) /* (A17) MCAN0_TX */
       >;
    };

    and this after the &main_i2c1 block:

    &m_can0 {
      status = "okay";
      pinctrl-names = "default";
      pinctrl-0 = <&mcan0_pins_default>;
      stb-gpios = <&exp1 8 GPIO_ACTIVE_LOW>;
      en-gpios = <&exp1 1 GPIO_ACTIVE_LOW>;
      can-transceiver {
        max-bitrate = <5000000>;
      };
    };

    &m_can1 {
      status = "okay";
      pinctrl-names = "default";
      pinctrl-0 = <&mcan1_pins_default>;
      stb-gpios = <&exp1 9 GPIO_ACTIVE_LOW>; /* Device is in standby when the line is high */
      /* en-gpios = <&exp1 1 GPIO_ACTIVE_HIGH>; */ /* Can't use the same pin twice */
      can-transceiver {
        max-bitrate = <5000000>;
      };
    };

    And then I added this to k3-am64-main.dtsi, just after the block that declares sdhc1:

    m_can0: mcan@20701000 {
      compatible = "bosch,m_can";
      reg = <0x0 0x20701000 0x0 0x200>,
            <0x0 0x20708000 0x0 0x8000>;
      reg-names = "m_can", "message_ram";
      power-domains = <&k3_pds 98 TI_SCI_PD_EXCLUSIVE>;
      clocks = <&k3_clks 98 0>, <&k3_clks 98 5>;
      clock-names = "cclk", "hclk";
      interrupt-parent = <&gic500>;
      interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>,
                   <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
      interrupt-names = "int0", "int1";
      bosch,mram-cfg = <0x0 0 0 32 0 0 1 1>;
      status = "okay";
    };

    m_can1: mcan@20711000 {
      compatible = "bosch,m_can";
      reg = <0x0 0x20711000 0x0 0x200>,
            <0x0 0x20718000 0x0 0x8000>;
      reg-names = "m_can", "message_ram";
      power-domains = <&k3_pds 99 TI_SCI_PD_EXCLUSIVE>;
      clocks = <&k3_clks 99 0>, <&k3_clks 99 5>;
      clock-names = "cclk", "hclk";
      interrupt-parent = <&gic500>;
      interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>,
                   <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
      interrupt-names = "int0", "int1";
      bosch,mram-cfg = <0x0 0 0 32 0 0 1 1>;
      status = "okay";
    };

  • Hi Brad,

    I am routing your query to our sw expert.

  • Hi Brad,

    Just want to make sure I understand, did the error start occurring after you added CAN to the DT?

    Thanks.

  • Hi Ron,

    Thanks for circling back on this.

    No, the error occurs even with the "stock" device tree.  Just to confirm that fact, I just now rebuilt the device tree again from out-of-the-box source and get the same error during boot, just with slightly different boot timing, of course:

    [ 2.387098] gpio-mux mux-controller: 2-way mux-controller registered
    [ 2.397664] davinci_gpio 601000.gpio: IRQ index 2 not found
    [ 2.403340] davinci_gpio 601000.gpio: IRQ not populated, err = -6

    Just to spell out my steps explicitly, my device tree build goes like this:

    cd ~/tisdk/build

    . conf/setenv

    cd ~/tisdk/build/arago-tmp-external-arm-glibc/work/am64xx_evm-linux/linux-ti-staging/5.4.87+gitAUTOINC+60de748aca-r0a.arago5/build/

    make ARCH=arm64 dtbs

    I then find the freshly built file in ~/tisdk/build/arago-tmp-external-arm-glibc/work/am64xx_evm-linux/linux-ti-staging/5.4.87+gitAUTOINC+60de748aca-r0a.arago5/build/arch/arm64/boot/dts/ti/k3-am642-evm.dtb 

    and copy it to the target at /boot/k3-am642-evm.dtb then reboot.

    FYI, I do see a couple of warnings during the DTB build, but the device tree seems reliable in every respect, except for this GPIO1 thing.

    arch/arm64/Makefile:27: ld does not support --fix-cortex-a53-843419; kernel may be susceptible to erratum
    arch/arm64/Makefile:38: LSE atomics not supported by binutils
    arch/arm64/Makefile:52: Detected assembler with broken .inst; disassembly will be unreliable
    DTC arch/arm64/boot/dts/ti/k3-am642-evm.dtb

    [Note that I set up my environment following the instructions at http://arago-project.org/wiki/index.php/Setting_Up_Build_Environment, although they were a bit out of date and required some massaging.  If you need it, I have a Word document with four pages of detailed notes on every step I took to set up the host, step by step, starting from "install the SDK".]

    Thanks,

    Brad

  • Hi Brad,

    This is an issue with resource management and the A53's don't have enough interrupts allocated in the v7.x release. This will be fixed in the upcoming 8.x release currently scheduled for July.

  • Thanks, Rob.  It sounds like that will fix the problem.  I look forward to the new release.