This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

AM6548: Unaligned memory access

Part Number: AM6548


Hi Ti team,

I use the following version sdk 

ti-processor-sdk-linux-rt-am65xx-evm-07_01_00_18-Linux-x86-Install.bin

It doesn't enable unaligned memory access function, the test result as below.

When I try to get a get a word value from address 0x20000001, the Linux kernel report bus error. 

Is it possible to enable unaligned memory access function.

Thanks

  • Hi Joey,

    I'm pretty sure /dev/mem for anything that isn't Linux' idea of RAM is going to end up mapped as uncached device type memory. Unaligned accesses are only supported for normal memory, this behavior is defined by the ARM architecture (as in ARMv8).

    From the address I'm guessing you're trying to read from something connected via the GPMC. If there's really something like normal memory behind, you should be able to map this differently with a driver of your own (or by modifying the behavior of /dev/mem). Normal memory means no side-effects when reads and writes don't appear in the same order or width, and reading/writing multiple times must not do any harm. I haven't used the GPMC on the AM65x, so not sure if that causes any limitations on its own.

    Maybe someone from TI has a better solution for you.

    Regards,

    Dominic

  • Hi Dominic,

    Yes, indeed! I try to access external mram through GPMC.

    Thanks for your reply.

  • Hi Joey,

    if you're able to recompile the kernel you could try a quick hack to modify properties of your memory mapped via /dev/mem. There's a function phys_mem_access_prot in arch/arm64/mm/mmu.c that determines the properties of the /dev/mem mapping. Either modify that function, or the /dev/mem driver at drivers/char/mem.c (which calls phys_mem_access_prot).

    Please note that the side effects of normal memory in general (e.g. you have no idea when your write access really reaches your memory) and of the unaligned access in particular (how wide is the mram chip, is it byte adressable, what does the GPMC do with your unaligned access) could well mean that even if you manage to get rid of the bus fault you still wont be able to do what you intend to (whatever that is).

    Regards,

    Dominic