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TDA4VM: Whether to enable DSI continuous clock mode

Part Number: TDA4VM

Hi  experts

psdk_rtos_auto_j7_07_00_00_11  Whether to enable DSI continuous clock mode?

dsi output:

prm.timings.width = 1280U;
prm.timings.height = 720U;
prm.timings.hFrontPorch = 110U;
prm.timings.hBackPorch = 220U;
prm.timings.hSyncLen = 40U;
prm.timings.vFrontPorch = 5U;
prm.timings.vBackPorch = 20U;
prm.timings.vSyncLen = 5U;
prm.timings.pixelClock = 74250000ULL;

Configuration above. The data channel on the DSI has a periodic voltage of more than 1V,

Set the oscilloscope trigger level to 800mV and monitor the data lane activity. If the DSI source is properly
configured to output periodic LP-11 pulses, then the scope should trigger at least once per frame. The period of
the frame is defined by the video refresh rate - commonly 16.6ms for 60Hz refresh. If the scope does not trigger
from the 800mV level, then the DSI source driver has not been properly configured

prm.timings.width = 1280*2U;
prm.timings.height = 720U;
prm.timings.hFrontPorch = 110*2U;
prm.timings.hBackPorch = 220*2U;
prm.timings.hSyncLen = 40*2U;
prm.timings.vFrontPorch = 5U;
prm.timings.vBackPorch = 20U;
prm.timings.vSyncLen = 5U;
prm.timings.pixelClock = 74250000*2ULL;

The configuration of this. The data channel on the DSI does not have a periodic voltage above 1V,

 Why does this configuration have no periodic 1V output

 

  • Hi gj y,

    I did not get your question, is it related continuous clock or DSI timing parameter?

    Can you pls check for the above timing, lane speed is sufficient?

    Regards,

    Brijesh 

  • HI Brijesh

    How can I change 2 lanes to 4 lanes? How can I change the speed of lane?

    prm.timings.width = 1280*2U;
    prm.timings.height = 720U;
    prm.timings.hFrontPorch = 110*2U;
    prm.timings.hBackPorch = 220*2U;
    prm.timings.hSyncLen = 40*2U;
    prm.timings.vFrontPorch = 5U;
    prm.timings.vBackPorch = 20U;
    prm.timings.vSyncLen = 5U;
    prm.timings.pixelClock = 74250000*2ULL;

    74.25Mhzx2 pclk , Use 4 lanes, how should I configure the following parameters?

    dsiObj->dphyTxIpDiv = 0x2;
    dsiObj->dphyTxOpDiv = 0x2;
    dsiObj->dphyTxFbDiv = 0x173;
    dsiObj->dphyTxRate = 0x1CE;
    dsiObj->cfgDsiTx.numOfLanes = 0x2u;
    dsiObj->privDsiTx.numOfLanes = 0x2u;

  • Hi gj y,

    Can you make below changes for 4 lanes output?

    1, change dsiParams.num_lanes to 4 in \ti-processor-sdk-rtos-j721e-evm-07_01_00_11/vision_apps/utils/dss/src/app_dss_defaults.c, vision_apps/utils/dss/src/app_dss_j721e.c file

    2, change ub941 config to accept 4 lanes, comment out below lines in\ti-processor-sdk-rtos-j721e-evm-07_01_00_11\vision_apps\utils\dss\src\app_dss_j721e.c

        {0x16, 0x4f, 0x84, 0x5},

    3, In the file ti-processor-sdk-rtos-j721e-evm-07_01_00_11\pdk_jacinto_07_01_00_45\packages\ti\drv\dss\src\drv\dctrl\dss_dctrlDsi.c, change below

        dsiObj->dphyTxOpDiv = 0x4;

        dsiObj->dphyTxRate = 0xE7;

    Regards,

    Brijesh