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Original question:

RTOS/AM5728: AM57x GPMC read access time

AM5728: Minimum GPMC clock rate

Saied Benyamin
Prodigy 130 points
Part Number: AM5728


A related thread covers this topic, but the answer does not detail out the solution that was offered.

https://e2e.ti.com/support/processors-group/processors/f/processors-forum/739980/rtos-am5728-am57x-gpmc-read-access-time

I am using a Beagleborad X-15.

I am accessing a NOR mode GPMC peripheral in the asynchronous multiplexed Address/Data mode. I need to run the GPMC_FCLK at 25MHz or below at the start and then once I bring up the peripheral chip, I can go back to the normal 266MHz speed.

Slowing the GPMC_CLK does not affect the asynchronous access timing as it was also mentioned in the other thread. Slowing down the L3MAIN1_L3_GICLK could have adverse effect on other modules such as memory controller. I am also planning on using RTOS (while I am currently testing under Ubuntu). I would appreciate any hints as to what solution was used or any thoughts on what I could do.

Thank you

-Saied

  • 0
    TI__Expert 6870 points

    Hi,

    As mentioned in the TRM, the source signal to GPMC module is L3MAIN1_L3_GICLK and destination signal is GPMC_FCLK (Table 15-447). Also, you can further divide GPMC_FCLK frequency by 1/2/3/4 (Table 15-450).

    You can manipulate the frequency to your desired value upto 266Mhz(Max supported by GPMC).

    As seen in the figure, L3MAIN1_L3_GICLK is going into GPMC and coming from DPLL_CORE. Therefore, you have to modify the DPLL_CORE registers(Table 3-456).

    There are so many combinations that can be used here. You can use multiplier and division from DPLL_CORE and make  L3MAIN1_L3_GICLK  itself to 25MHz or you can make L3MAIN1_L3_GICLK to 100 MHz and use GPMC_FCLK  to cut it down to 25 Mhz. You can use any combination, but if you are configuring L3MAIN1_L3_GICLK, make sure it will not disturb other modules as you can go from  625kHz - 81880Mhz for L3MAIN1_L3_GICLK.

    My suggestion is to use Clock Tree tool for Sitara platform provided by TI, which is easy to use and help in visualizing the clocks better. You can do a lot of things like modify the registers, get the register dump, verify the modification from CCS and so on.

  • 0 in reply to ANUBHAV AKASH
    Prodigy 130 points

    Hi Anibhav. Thank you for your response.

    Table 15-450 that you refer to, uses GPMC_FCLK to set the frequency for GPMC_CLK. This clock only affects synchronous mode of operation, and I am using asynchronous. So that divider does not make a difference in the operation for the mode I am using.  The L3MAIN1_L3_GICLK from table 15-447 is also used for other peripherals (namelyl the memory controller). I understand how I can change the frequency but am concerned about other peripherals hanging on this clock. I am using the beagleboard X-15 and it is likely that the memory controller will be affected when I change this clock. My question is if the solution in the thread I refer to figured out how to get around this.

    Thank you

  • 0 in reply to Saied Benyamin
    TI__Expert 6870 points

    Hi,

    If you see the figure mentioned in previous reply, Memory controller is connected through Divider, having divide factor 2. Therefore, it will be  always less than GPMC. Moreover, Maximum frequency supported by OCMC is 266Mhz.

    Also in the referred thread, they found how to reduce the L3MAIN1_L3_GICLK and it worked . I have already mentioned about the registers need to be updated for doing so. Use TRACE view of clock tree tool, It will give you details about the registers need to be modified for particular configuration. You can also run frequency analyzer from that tool to check whether your configured frequencies are conflicting or not. 

  • 0 in reply to ANUBHAV AKASH
    Prodigy 130 points

    I installed the software and for some reason, the picture I see does not properly reflect what you see.  Here is the picture. The only GPMC block I see is GPMC0. I checked that I am using the correct processor. I do not see anything else in any of the search methods, I also visually scanned the entire picture.  Can you point the area of the picture where GPMC block is that you show in your picture.  Or am I doing something else wrong and getting the wrong clock tree?  Thank you

  • +1 in reply to Saied Benyamin
    TI__Expert 6870 points

    Hi,

    You can see this for detailed instructions on How to use clock tree tool GUI:  CLOCK TREE TOOL USER MANUAL.

    For seeing any particular module, Select GPMC in Blocks, L3MAIN1_L3_GICLK  in signals and then fo to view -> hide others. 

    In this way you can see any particular clock line.

  • +1 in reply to ANUBHAV AKASH
    Prodigy 130 points

    Sorry I was looking at AM7528 rather than AM5728. Thanks for your help.