• State Resolved
  • Locked Locked
  • Replies 1 reply
  • Subscribers 97 subscribers
  • Views 558 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TDA4VM: QNX's share memory cache invalid and write back are NULLs

hutian
Expert 1785 points

Part Number: TDA4VM

Hi expert,

I found that the functions regarding memory cache under "ti-processor-sdk-rtos-j721e-evm-07_02_00_06/psdkqa/qnx/pdk/packages/ti/osal/src/qnx/CacheP_nonos.c"

is 

void CacheP_wb(const void * addr, int32_t size)
{
return;
}
void CacheP_wbInv(const void * addr, int32_t size)
{
return;
}
void CacheP_Inv(const void * addr, int32_t size)
{
return;
}
May i ask is it no need to do this job or TI will finish this part in future?
Thanks,
hutian 
  • +1
    TI__Guru*** 132731 points

    Hi Hutian

    The TDA4VM device is cache coherent from A72 perspective, and these APIs are left empty accordingly.

    The APIs remain to provide a code base that can be moved to devices where cache utilities are required.

    Regards,

    kb