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AM4378: eMMC recognition problem

han hosung
Prodigy 20 points

Part Number: AM4378

Hi, Forum.

I have an eMMC problem on AM4378 Custom board. 

in u-boot

=> mmc list
OMAP SD/MMC: 0 (SD)
OMAP SD/MMC: 1

=> mmc dev 1
switch to partitions #0, OK
mmc1(part 0) is current device

=> mmc info
Device: OMAP SD/MMC
Manufacturer ID: 9d
OEM: 101
Name: IS004
Bus Speed: 48000000
Mode : MMC High Speed (52MHz)
Rd Block Len: 512
MMC version 5.0
High Capacity: Yes
Capacity: 3.6 GiB
Bus Width: 8-bit
Erase Group Size: 512 KiB
HC WP Group Size: 8 MiB
User Capacity: 3.6 GiB WRREL
Boot Capacity: 2 MiB ENH
RPMB Capacity: 512 KiB ENH

=> mmc list
OMAP SD/MMC: 0 (SD)
OMAP SD/MMC: 1 (eMMC)

in kernel 

fdisk -l

Disk /dev/mmcblk1: 59.5 GiB, 63864569856 bytes, 124735488 sectors
Units: sectors of 1 * 512 = 512 bytes
Sector size (logical/physical): 512 bytes / 512 bytes
I/O size (minimum/optimal): 512 bytes / 512 bytes
Disklabel type: dos
Disk identifier: 0xcba0b265

Device Boot Start End Sectors Size Id Type
/dev/mmcblk1p1 * 2048 145407 143360 70M c W95 FAT32 (LBA)
/dev/mmcblk1p2 145408 24543231 24397824 11.6G 83 Linux

dmesg | grep -i "mmc"

If have any ideas, please share to me. 

Thank you.  

  • 0
    TI__Guru** 109330 points

    Hello,

    Are you seeing any errors? Or are you just concerned about the "of_get_named_gpoid_flags" outputs? These are expected, since your device tree entry will not provide all available options. See Documentation/devicetree/bindings/mmc/mmc.txt for more information.

    Regards,

    Nick

  • 0 in reply to Nick Saulnier
    Prodigy 20 points

    I want to be able to mount eMMC and use it on linux OS.

    The U-boot code is as follows.

    /dts-v1/;

#include "am4372.dtsi"
#include <dt-bindings/pinctrl/am43xx.h>
#include <dt-bindings/pwm/pwm.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/irq.h>

/ {
	model = "TI AM437x SK EVM";
	compatible = "ti,am437x-sk-evm","ti,am4372","ti,am43";

	chosen {
		stdout-path = &uart0;
	};
	evm_v3_3d: fixedregulator-v3_3d {
        compatible = "regulator-fixed";
        regulator-name = "evm_v3_3d";
        regulator-min-microvolt = <3300000>;
        regulator-max-microvolt = <3300000>;
        enable-active-high;
        regulator-boot-on;
        regulator-always-on;
	};
};

&am43xx_pinmux {
	mycam1_pins_default: mycam1_pins_default {
		pinctrl-single,pins = <
			AM4372_IOPAD(0x9b0, PIN_INPUT | MUX_MODE0) /* (AE17) cam0_hd.cam0_hd */
			AM4372_IOPAD(0x9b4, PIN_INPUT | MUX_MODE0) /* (AD18) cam0_vd.cam0_vd */
			AM4372_IOPAD(0x9c0, PIN_INPUT | MUX_MODE0) /* (AC20) cam0_pclk.cam0_pclk */
			AM4372_IOPAD(0xa08, PIN_INPUT | MUX_MODE0) /* (AE18) cam0_data0.cam0_data0 */
			AM4372_IOPAD(0xa0c, PIN_INPUT | MUX_MODE0) /* (AB18) cam0_data1.cam0_data1 */
			AM4372_IOPAD(0xa10, PIN_INPUT | MUX_MODE0) /* (Y18) cam0_data2.cam0_data2 */
			AM4372_IOPAD(0xa14, PIN_INPUT | MUX_MODE0) /* (AA18) cam0_data3.cam0_data3 */
			AM4372_IOPAD(0xa18, PIN_INPUT | MUX_MODE0) /* (AE19) cam0_data4.cam0_data4 */
			AM4372_IOPAD(0xa1c, PIN_INPUT | MUX_MODE0) /* (AD19) cam0_data5.cam0_data5 */
			AM4372_IOPAD(0xa20, PIN_INPUT | MUX_MODE0) /* (AE20) cam0_data6.cam0_data6 */
			AM4372_IOPAD(0xa24, PIN_INPUT | MUX_MODE0) /* (AD20) cam0_data7.cam0_data7 */
		>;
	};

	mydebugss1_pins_default: mydebugss1_pins_default {
		pinctrl-single,pins = <
			AM4372_IOPAD(0xa90, PIN_INPUT | MUX_MODE0) /* (Y24) TMS.TMS */
			AM4372_IOPAD(0xa94, PIN_INPUT | MUX_MODE0) /* (Y20) TDI.TDI */
			AM4372_IOPAD(0xa98, PIN_OUTPUT | MUX_MODE0) /* (AA24) TDO.TDO */
			AM4372_IOPAD(0xa9c, PIN_INPUT | MUX_MODE0) /* (AA25) TCK.TCK */
			AM4372_IOPAD(0xaa0, PIN_INPUT | MUX_MODE0) /* (Y25) nTRST.nTRST */
			AM4372_IOPAD(0xaa4, PIN_INPUT | MUX_MODE0) /* (N23) EMU0.EMU0 */
			AM4372_IOPAD(0xaa8, PIN_INPUT | MUX_MODE0) /* (T24) EMU1.EMU1 */
		>;
	};


	mydss1_pins_default: mydss1_pins_default {
		pinctrl-single,pins = <
			AM4372_IOPAD(0x8e0, PIN_OUTPUT | MUX_MODE0) /* (B23) dss_vsync.dss_vsync */
			AM4372_IOPAD(0x8e4, PIN_OUTPUT | MUX_MODE0) /* (A23) dss_hsync.dss_hsync */
			AM4372_IOPAD(0x8e8, PIN_OUTPUT | MUX_MODE0) /* (A22) dss_pclk.dss_pclk */
			AM4372_IOPAD(0x8ec, PIN_OUTPUT | MUX_MODE0) /* (A24) dss_ac_bias_en.dss_ac_bias_en */
			AM4372_IOPAD(0x8a0, PIN_OUTPUT | MUX_MODE0) /* (B22) dss_data0.dss_data0 */
			AM4372_IOPAD(0x8a4, PIN_OUTPUT | MUX_MODE0) /* (A21) dss_data1.dss_data1 */
			AM4372_IOPAD(0x8a8, PIN_OUTPUT | MUX_MODE0) /* (B21) dss_data2.dss_data2 */
			AM4372_IOPAD(0x8ac, PIN_OUTPUT | MUX_MODE0) /* (C21) dss_data3.dss_data3 */
			AM4372_IOPAD(0x8b0, PIN_OUTPUT | MUX_MODE0) /* (A20) dss_data4.dss_data4 */
			AM4372_IOPAD(0x8b4, PIN_OUTPUT | MUX_MODE0) /* (B20) dss_data5.dss_data5 */
			AM4372_IOPAD(0x8b8, PIN_OUTPUT | MUX_MODE0) /* (C20) dss_data6.dss_data6 */
			AM4372_IOPAD(0x8bc, PIN_OUTPUT | MUX_MODE0) /* (E19) dss_data7.dss_data7 */
			AM4372_IOPAD(0x8c0, PIN_OUTPUT | MUX_MODE0) /* (A19) dss_data8.dss_data8 */
			AM4372_IOPAD(0x8c4, PIN_OUTPUT | MUX_MODE0) /* (B19) dss_data9.dss_data9 */
			AM4372_IOPAD(0x8c8, PIN_OUTPUT | MUX_MODE0) /* (A18) dss_data10.dss_data10 */
			AM4372_IOPAD(0x8cc, PIN_OUTPUT | MUX_MODE0) /* (B18) dss_data11.dss_data11 */
			AM4372_IOPAD(0x8d0, PIN_OUTPUT | MUX_MODE0) /* (C19) dss_data12.dss_data12 */
			AM4372_IOPAD(0x8d4, PIN_OUTPUT | MUX_MODE0) /* (D19) dss_data13.dss_data13 */
			AM4372_IOPAD(0x8d8, PIN_OUTPUT | MUX_MODE0) /* (C17) dss_data14.dss_data14 */
			AM4372_IOPAD(0x8dc, PIN_OUTPUT | MUX_MODE0) /* (D17) dss_data15.dss_data15 */
			AM4372_IOPAD(0x83c, PIN_OUTPUT | MUX_MODE1) /* (A11) gpmc_ad15.dss_data16 */
			AM4372_IOPAD(0x838, PIN_OUTPUT | MUX_MODE1) /* (B11) gpmc_ad14.dss_data17 */
			AM4372_IOPAD(0x834, PIN_OUTPUT | MUX_MODE1) /* (C11) gpmc_ad13.dss_data18 */
			AM4372_IOPAD(0x830, PIN_OUTPUT | MUX_MODE1) /* (E11) gpmc_ad12.dss_data19 */
			AM4372_IOPAD(0x82c, PIN_OUTPUT | MUX_MODE1) /* (D11) gpmc_ad11.dss_data20 */
			AM4372_IOPAD(0x828, PIN_OUTPUT | MUX_MODE1) /* (F11) gpmc_ad10.dss_data21 */
			AM4372_IOPAD(0x824, PIN_OUTPUT | MUX_MODE1) /* (A10) gpmc_ad9.dss_data22 */
			AM4372_IOPAD(0x820, PIN_OUTPUT | MUX_MODE1) /* (B10) gpmc_ad8.dss_data23 */
		>;
	};

	mygpio1_pins_default: mygpio1_pins_default {
		pinctrl-single,pins = <
			AM4372_IOPAD(0x9d0, PIN_INPUT | MUX_MODE7) /* (AD24) cam1_data8.gpio4[8] */
			AM4372_IOPAD(0x9d4, PIN_INPUT | MUX_MODE7) /* (AD25) cam1_hd.gpio4[9] */
			AM4372_IOPAD(0x9d8, PIN_INPUT | MUX_MODE7) /* (AC23) cam1_vd.gpio4[10] */
			AM4372_IOPAD(0x9dc, PIN_INPUT | MUX_MODE7) /* (AE21) cam1_pclk.gpio4[11] */
			AM4372_IOPAD(0x9e0, PIN_INPUT | MUX_MODE7) /* (AC25) cam1_field.gpio4[12] */
			AM4372_IOPAD(0x9e4, PIN_INPUT | MUX_MODE7) /* (AB25) cam1_wen.gpio4[13] */
			AM4372_IOPAD(0x9e8, PIN_INPUT | MUX_MODE7) /* (AB20) cam1_data0.gpio4[14] */
			AM4372_IOPAD(0x9ec, PIN_INPUT | MUX_MODE7) /* (AC21) cam1_data1.gpio4[15] */
			AM4372_IOPAD(0x9f0, PIN_INPUT | MUX_MODE7) /* (AD21) cam1_data2.gpio4[16] */
			AM4372_IOPAD(0x9f4, PIN_INPUT | MUX_MODE7) /* (AE22) cam1_data3.gpio4[17] */
			AM4372_IOPAD(0x9f8, PIN_INPUT | MUX_MODE7) /* (AD22) cam1_data4.gpio4[18] */
			AM4372_IOPAD(0x9fc, PIN_INPUT | MUX_MODE7) /* (AE23) cam1_data5.gpio4[19] */
			AM4372_IOPAD(0xa00, PIN_INPUT | MUX_MODE7) /* (AD23) cam1_data6.gpio4[20] */
			AM4372_IOPAD(0xa04, PIN_INPUT | MUX_MODE7) /* (AE24) cam1_data7.gpio4[21] */
		>;
	};

	myi2c1_pins_default: myi2c1_pins_default {
		pinctrl-single,pins = <
			AM4372_IOPAD(0x98c, PIN_INPUT | MUX_MODE0) /* (Y22) I2C0_SCL.I2C0_SCL */
			AM4372_IOPAD(0x988, PIN_INPUT | MUX_MODE0) /* (AB24) I2C0_SDA.I2C0_SDA */
		>;
	};

	myi2c2_pins_default: myi2c2_pins_default {
		pinctrl-single,pins = <
			AM4372_IOPAD(0xa40, PIN_INPUT | MUX_MODE1) /* (G20) gpio5_10.I2C1_SCL */
			AM4372_IOPAD(0xa48, PIN_INPUT | MUX_MODE1) /* (E25) gpio5_12.I2C1_SDA */
		>;
	};
	mymcasp1_pins_default: mymcasp1_pins_default {
		pinctrl-single,pins = <
			AM4372_IOPAD(0x990, PIN_INPUT | MUX_MODE0) /* (N24) mcasp0_aclkx.mcasp0_aclkx */
			AM4372_IOPAD(0x994, PIN_INPUT | MUX_MODE0) /* (N22) mcasp0_fsx.mcasp0_fsx */
			AM4372_IOPAD(0x998, PIN_OUTPUT | MUX_MODE0) /* (H23) mcasp0_axr0.mcasp0_axr0 */
			AM4372_IOPAD(0x9a8, PIN_OUTPUT | MUX_MODE0) /* (M25) mcasp0_axr1.mcasp0_axr1 */
		>;
	};


	mymdio1_pins_default: mymdio1_pins_default {
		pinctrl-single,pins = <
			AM4372_IOPAD(0x94c, PIN_OUTPUT | MUX_MODE0) /* (B17) mdio_clk.mdio_clk */
			AM4372_IOPAD(0x948, PIN_INPUT | MUX_MODE0) /* (A17) mdio_data.mdio_data */
		>;
	};

        cpsw_default: cpsw_default {
                pinctrl-single,pins = <
           		AM4372_IOPAD(0x878, PIN_INPUT | MUX_MODE1) /* (A3) gpmc_be1n.gmii2_col */
			AM4372_IOPAD(0x870, PIN_INPUT | MUX_MODE1) /* (A2) gpmc_wait0.gmii2_crs */
			AM4372_IOPAD(0x874, PIN_INPUT | MUX_MODE1) /* (B3) gpmc_wpn.gmii2_rxer */
			AM4372_IOPAD(0x840, PIN_OUTPUT | MUX_MODE1) /* (C3) gpmc_a0.gmii2_txen */
			AM4372_IOPAD(0x844, PIN_INPUT | MUX_MODE1) /* (C5) gpmc_a1.gmii2_rxdv */
			AM4372_IOPAD(0x858, PIN_INPUT | MUX_MODE1) /* (E8) gpmc_a6.gmii2_txclk */
			AM4372_IOPAD(0x85c, PIN_INPUT | MUX_MODE1) /* (F6) gpmc_a7.gmii2_rxclk */
			AM4372_IOPAD(0x854, PIN_OUTPUT | MUX_MODE1) /* (E7) gpmc_a5.gmii2_txd0 */
			AM4372_IOPAD(0x850, PIN_OUTPUT | MUX_MODE1) /* (D7) gpmc_a4.gmii2_txd1 */
			AM4372_IOPAD(0x84c, PIN_OUTPUT | MUX_MODE1) /* (A4) gpmc_a3.gmii2_txd2 */
			AM4372_IOPAD(0x848, PIN_OUTPUT | MUX_MODE1) /* (C6) gpmc_a2.gmii2_txd3 */
			AM4372_IOPAD(0x86c, PIN_INPUT | MUX_MODE1) /* (D8) gpmc_a11.gmii2_rxd0 */
			AM4372_IOPAD(0x868, PIN_INPUT | MUX_MODE1) /* (G8) gpmc_a10.gmii2_rxd1 */
			AM4372_IOPAD(0x864, PIN_INPUT | MUX_MODE1) /* (B4) gpmc_a9.gmii2_rxd2 */
			AM4372_IOPAD(0x860, PIN_INPUT | MUX_MODE1) /* (F7) gpmc_a8.gmii2_rxd3 */

			AM4372_IOPAD(0x908, PIN_INPUT | MUX_MODE0) /* (D16) mii1_col.gmii1_col */
			AM4372_IOPAD(0x90c, PIN_INPUT | MUX_MODE0) /* (B14) mii1_crs.gmii1_crs */
			AM4372_IOPAD(0x910, PIN_INPUT | MUX_MODE0) /* (B13) mii1_rx_er.gmii1_rxer */
			AM4372_IOPAD(0x914, PIN_OUTPUT | MUX_MODE0) /* (A13) mii1_tx_en.gmii1_txen */
			AM4372_IOPAD(0x918, PIN_INPUT | MUX_MODE0) /* (A15) mii1_rx_dv.gmii1_rxdv */
			AM4372_IOPAD(0x92c, PIN_INPUT | MUX_MODE0) /* (D14) mii1_tx_clk.gmii1_txclk */
			AM4372_IOPAD(0x930, PIN_INPUT | MUX_MODE0) /* (D13) mii1_rx_clk.gmii1_rxclk */
			AM4372_IOPAD(0x928, PIN_OUTPUT | MUX_MODE0) /* (B15) mii1_txd0.gmii1_txd0 */
			AM4372_IOPAD(0x924, PIN_OUTPUT | MUX_MODE0) /* (A14) mii1_txd1.gmii1_txd1 */
			AM4372_IOPAD(0x920, PIN_OUTPUT | MUX_MODE0) /* (C13) mii1_txd2.gmii1_txd2 */
			AM4372_IOPAD(0x91c, PIN_OUTPUT | MUX_MODE0) /* (C16) mii1_txd3.gmii1_txd3 */
			AM4372_IOPAD(0x940, PIN_INPUT | MUX_MODE0) /* (F17) mii1_rxd0.gmii1_rxd0 */
			AM4372_IOPAD(0x93c, PIN_INPUT | MUX_MODE0) /* (B16) mii1_rxd1.gmii1_rxd1 */
			AM4372_IOPAD(0x938, PIN_INPUT | MUX_MODE0) /* (E16) mii1_rxd2.gmii1_rxd2 */
			AM4372_IOPAD(0x934, PIN_INPUT | MUX_MODE0) /* (C14) mii1_rxd3.gmii1_rxd3 */	
		>;
        };

	mymmc1_pins_default: mymmc1_pins_default {
		pinctrl-single,pins = <
			AM4372_IOPAD(0x900, PIN_INPUT | MUX_MODE0) /* (D1) mmc0_clk.mmc0_clk */
			AM4372_IOPAD(0x904, PIN_INPUT | MUX_MODE0) /* (D2) mmc0_cmd.mmc0_cmd */
			AM4372_IOPAD(0x8fc, PIN_INPUT | MUX_MODE0) /* (C1) mmc0_dat0.mmc0_dat0 */
			AM4372_IOPAD(0x8f8, PIN_INPUT | MUX_MODE0) /* (C2) mmc0_dat1.mmc0_dat1 */
			AM4372_IOPAD(0x8f4, PIN_INPUT | MUX_MODE0) /* (B2) mmc0_dat2.mmc0_dat2 */
			AM4372_IOPAD(0x8f0, PIN_INPUT | MUX_MODE0) /* (B1) mmc0_dat3.mmc0_dat3 */
			AM4372_IOPAD(0x960, PIN_INPUT | MUX_MODE5) /* (R25) spi0_cs1.mmc0_sdcd */
			AM4372_IOPAD(0x9a0, PIN_INPUT | MUX_MODE4) /* (L23) mcasp0_aclkr.mmc0_sdwp */
		>;
	};


	mymmc2_pins_default: mymmc2_pins_default {
		pinctrl-single,pins = <
			AM4372_IOPAD(0x880, PIN_INPUT | MUX_MODE2) /* (B9) gpmc_csn1.mmc1_clk */
			AM4372_IOPAD(0x884, PIN_INPUT | MUX_MODE2) /* (F10) gpmc_csn2.mmc1_cmd */
			AM4372_IOPAD(0x800, PIN_INPUT | MUX_MODE1) /* (B5) gpmc_ad0.mmc1_dat0 */
			AM4372_IOPAD(0x804, PIN_INPUT | MUX_MODE1) /* (A5) gpmc_ad1.mmc1_dat1 */
			AM4372_IOPAD(0x808, PIN_INPUT | MUX_MODE1) /* (B6) gpmc_ad2.mmc1_dat2 */
			AM4372_IOPAD(0x80c, PIN_INPUT | MUX_MODE1) /* (A6) gpmc_ad3.mmc1_dat3 */
			AM4372_IOPAD(0x810, PIN_INPUT | MUX_MODE1) /* (B7) gpmc_ad4.mmc1_dat4 */
			AM4372_IOPAD(0x814, PIN_INPUT | MUX_MODE1) /* (A7) gpmc_ad5.mmc1_dat5 */
			AM4372_IOPAD(0x818, PIN_INPUT | MUX_MODE1) /* (C8) gpmc_ad6.mmc1_dat6 */
			AM4372_IOPAD(0x81c, PIN_INPUT | MUX_MODE1) /* (B8) gpmc_ad7.mmc1_dat7 */
		>;
	};

	myosc1_pins_default: myosc1_pins_default {
		pinctrl-single,pins = <
			AM4372_IOPAD(0xaac, PIN_INPUT | MUX_MODE0) /* (AE5) RTC_XTALIN.OSC1_IN */
			AM4372_IOPAD(0xab0, PIN_OUTPUT | MUX_MODE0) /* (AE4) RTC_XTALOUT.OSC1_OUT */
		>;
	};


	myosc2_pins_default: myosc2_pins_default {
		pinctrl-single,pins = <
			AM4372_IOPAD(0xa88, PIN_INPUT | MUX_MODE0) /* (C25) XTALIN.OSC0_IN */
			AM4372_IOPAD(0xa8c, PIN_OUTPUT | MUX_MODE0) /* (B25) XTALOUT.OSC0_OUT */
		>;
	};


	myrtc1_pins_default: myrtc1_pins_default {
		pinctrl-single,pins = <
			AM4372_IOPAD(0xab4, PIN_INPUT | MUX_MODE0) /* (AE6) RTC_PWRONRSTn.RTC_PORz */
			AM4372_IOPAD(0xab8, PIN_OUTPUT | MUX_MODE0) /* (AE3) RTC_WAKEUP.RTC_WAKEUP */
			AM4372_IOPAD(0xabc, PIN_INPUT | MUX_MODE0) /* (AD6) RTC_PMIC_EN.RTC_PMIC_EN */
		>;
	};

	myspi1_pins_default: myspi1_pins_default {
		pinctrl-single,pins = <
			AM4372_IOPAD(0x950, PIN_INPUT | MUX_MODE0) /* (P23) spi0_sclk.spi0_sclk */
			AM4372_IOPAD(0x954, PIN_INPUT | MUX_MODE0) /* (T22) spi0_d0.spi0_d0 */
			AM4372_IOPAD(0x958, PIN_INPUT | MUX_MODE0) /* (T21) spi0_d1.spi0_d1 */
			AM4372_IOPAD(0x95c, PIN_OUTPUT | MUX_MODE0) /* (T20) spi0_cs0.spi0_cs0 */
		>;
	};

	myspi2_pins_default: myspi2_pins_default {
		pinctrl-single,pins = <
			AM4372_IOPAD(0x964, PIN_INPUT | MUX_MODE4) /* (G24) eCAP0_in_PWM0_out.spi1_sclk */
			AM4372_IOPAD(0x968, PIN_INPUT | MUX_MODE4) /* (L25) uart0_ctsn.spi1_d0 */
			AM4372_IOPAD(0x96c, PIN_INPUT | MUX_MODE4) /* (J25) uart0_rtsn.spi1_d1 */
			AM4372_IOPAD(0x944, PIN_OUTPUT | MUX_MODE2) /* (A16) rmii1_ref_clk.spi1_cs0 */
		>;
	};

	myuart1_pins_default: myuart1_pins_default {
		pinctrl-single,pins = <
			AM4372_IOPAD(0xa28, PIN_INPUT | MUX_MODE0) /* (H25) uart3_rxd.uart3_rxd */
			AM4372_IOPAD(0xa2c, PIN_OUTPUT | MUX_MODE0) /* (H24) uart3_txd.uart3_txd */
		>;
	};

	myuart2_pins_default: myuart2_pins_default {
		pinctrl-single,pins = <
			AM4372_IOPAD(0x980, PIN_INPUT | MUX_MODE0) /* (K21) uart1_rxd.uart1_rxd */
			AM4372_IOPAD(0x984, PIN_OUTPUT | MUX_MODE0) /* (L21) uart1_txd.uart1_txd */
		>;
	};

	myuart3_pins_default: myuart3_pins_default {
		pinctrl-single,pins = <
			AM4372_IOPAD(0x970, PIN_INPUT | MUX_MODE0) /* (K25) uart0_rxd.uart0_rxd */
			AM4372_IOPAD(0x974, PIN_OUTPUT | MUX_MODE0) /* (J24) uart0_txd.uart0_txd */
		>;
	};


	myusb1_pins_default: myusb1_pins_default {
		pinctrl-single,pins = <
			AM4372_IOPAD(0xac0, PIN_OUTPUT | MUX_MODE0) /* (G21) USB0_DRVVBUS.USB0_DRVVBUS */
		>;
	};

	myusb2_pins_default: myusb2_pins_default {
		pinctrl-single,pins = <
			AM4372_IOPAD(0xac4, PIN_OUTPUT | MUX_MODE0) /* (F25) USB1_DRVVBUS.USB1_DRVVBUS */
		>;
	};
};

&i2c0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&myi2c1_pins_default>;
	clock-frequency = <100000>;

	tps@24 {
		compatible = "ti,tps65218";
		reg = <0x24>;
		interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
		interrupt-controller;
		#interrupt-cells = <2>;

		dcdc1: regulator-dcdc1 {
			/* VDD_CORE limits min of OPP50 and max of OPP100 */
			regulator-name = "vdd_core";
			regulator-min-microvolt = <912000>;
			regulator-max-microvolt = <1144000>;
			regulator-boot-on;
			regulator-always-on;
		};

		dcdc2: regulator-dcdc2 {
			/* VDD_MPU limits min of OPP50 and max of OPP_NITRO */
			regulator-name = "vdd_mpu";
			regulator-min-microvolt = <912000>;
			regulator-max-microvolt = <1378000>;
			regulator-boot-on;
			regulator-always-on;
		};

		dcdc3: regulator-dcdc3 {
			regulator-name = "vdds_ddr";
			regulator-boot-on;
			regulator-always-on;
			regulator-state-mem {
				regulator-on-in-suspend;
			};
			regulator-state-disk {
				regulator-off-in-suspend;
			};
		};

		dcdc4: regulator-dcdc4 {
			regulator-name = "v3_3d";
			regulator-min-microvolt = <3300000>;
			regulator-max-microvolt = <3300000>;
			regulator-boot-on;
			regulator-always-on;
		};

		dcdc5: regulator-dcdc5 {
			compatible = "ti,tps65218-dcdc5";
			regulator-name = "v1_0bat";
			regulator-min-microvolt = <1000000>;
			regulator-max-microvolt = <1000000>;
			regulator-boot-on;
			regulator-always-on;
			regulator-state-mem {
				regulator-on-in-suspend;
			};
		};

		dcdc6: regulator-dcdc6 {
			compatible = "ti,tps65218-dcdc6";
			regulator-name = "v1_8bat";
			regulator-min-microvolt = <1800000>;
			regulator-max-microvolt = <1800000>;
			regulator-boot-on;
			regulator-always-on;
			regulator-state-mem {
				regulator-on-in-suspend;
			};
		};

		ldo1: regulator-ldo1 {
			regulator-name = "v1_8d";
			regulator-min-microvolt = <1800000>;
			regulator-max-microvolt = <1800000>;
			regulator-boot-on;
			regulator-always-on;
		};

		power-button {
			compatible = "ti,tps65218-pwrbutton";
			status = "okay";
			interrupts = <3 IRQ_TYPE_EDGE_BOTH>;
		};
	};
	at24@50 {
		compatible = "atmel,24c256";
		pagesize = <64>;
		reg = <0x50>;
	};
};

&epwmss0 {
	status = "okay";
};

/*
&gpio1 {
	status = "okay";
};

&gpio4 {
	status = "okay";
};
*/


&mmc1 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&mymmc1_pins_default>;

	vmmc-supply = <&evm_v3_3d>;//<&dcdc4>;
	bus-width = <4>;
	cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
};

&mmc2 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&mymmc2_pins_default>;

	vmmc-supply = <&evm_v3_3d>;//<&dcdc4>;
	bus-width = <8>;
	ti,non-removable;
};

&uart1 {
	status = "okay";
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&myuart1_pins_default>;
};

&uart2 {
	status = "okay";
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&myuart2_pins_default>;
};

&uart3 {
	status = "okay";
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&myuart3_pins_default>;
};

&usb1 {
	dr_mode = "host";
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&myusb1_pins_default>;
};

&usb2 {
	dr_mode = "host";
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&myusb2_pins_default>;
};

&mac {
    pinctrl-names = "default", "sleep";
    pinctrl-0 = <&cpsw_default>;
    dual_emac = <2>;
    status = "okay";
};

&cpsw_emac0 {
        phy-handle = <&dp83867_0>;
        phy_id = <&davinci_mdio>, <4>;
        phy-mode = "mii";
        ti,dual-emac-pvid = <1>;
	fixed-link {
	speed = <100>;
	full-duplex;
	};
};

&cpsw_emac1 {
        phy-handle = <&dp83867_1>;
        phy_id = <&davinci_mdio>, <5>;
        phy-mode = "mii";
        ti,dual-emac-pvid = <2>;
	fixed-link {
	speed = <100>;
	full-duplex;
	};
};

&davinci_mdio {
    pinctrl-names = "default";
    pinctrl-0 = <&mymdio1_pins_default>;
    status = "okay";
    dp83867_0: ethernet-phy@4 {
        reg = <4>;
        ti,min-output-impedance;
        ti,dp83867-rxctrl-strap-quirk;
    };
    dp83867_1: ethernet-phy@5 {
        reg = <5>;
        ti,min-output-impedance;
        ti,dp83867-rxctrl-strap-quirk;
        };
};

&phy_sel {
	rmii-clock-ext;
};

&elm {
	status = "okay";
};

&wdt {
	status = "okay";
};

&cpu {
	cpu0-supply = <&dcdc2>;
};

&sgx {
	status = "okay";
};

&wkup_m3_ipc {
	ti,scale-data-fw = "am43x-evm-scale-data.bin";
};

&pruss_soc_bus {
	status = "okay";

	pruss1: pruss@54400000 {
		status = "okay";
	};

	pruss0: pruss@54440000 {
		status = "okay";
	};
};


    

    and mux.c is.
    

    // SPDX-License-Identifier: GPL-2.0+
/*
 * mux.c
 *
 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
 */

#include <common.h>
#include <asm/arch/sys_proto.h>
#include <asm/arch/mux.h>
#include "../common/board_detect.h"
#include "board.h"

static struct module_pin_mux rmii1_pin_mux[] = {
	{OFFSET(mii1_txen), MODE(1)},			/* RMII1_TXEN */
	{OFFSET(mii1_txd1), MODE(1)},			/* RMII1_TD1 */
	{OFFSET(mii1_txd0), MODE(1)},			/* RMII1_TD0 */
	{OFFSET(mii1_rxd1), MODE(1) | RXACTIVE},	/* RMII1_RD1 */
	{OFFSET(mii1_rxd0), MODE(1) | RXACTIVE},	/* RMII1_RD0 */
	{OFFSET(mii1_rxdv), MODE(1) | RXACTIVE},	/* RMII1_RXDV */
	{OFFSET(mii1_crs), MODE(1) | RXACTIVE},		/* RMII1_CRS_DV */
	{OFFSET(mii1_rxerr), MODE(1) | RXACTIVE},	/* RMII1_RXERR */
	{OFFSET(rmii1_refclk), MODE(0) | RXACTIVE},	/* RMII1_refclk */
	{-1},
};

static struct module_pin_mux rgmii1_pin_mux[] = {
	{OFFSET(mii1_txen), MODE(2)},			/* RGMII1_TCTL */
	{OFFSET(mii1_rxdv), MODE(2) | RXACTIVE},	/* RGMII1_RCTL */
	{OFFSET(mii1_txd3), MODE(2)},			/* RGMII1_TD3 */
	{OFFSET(mii1_txd2), MODE(2)},			/* RGMII1_TD2 */
	{OFFSET(mii1_txd1), MODE(2)},			/* RGMII1_TD1 */
	{OFFSET(mii1_txd0), MODE(2)},			/* RGMII1_TD0 */
	{OFFSET(mii1_txclk), MODE(2)},			/* RGMII1_TCLK */
	{OFFSET(mii1_rxclk), MODE(2) | RXACTIVE},	/* RGMII1_RCLK */
	{OFFSET(mii1_rxd3), MODE(2) | RXACTIVE},	/* RGMII1_RD3 */
	{OFFSET(mii1_rxd2), MODE(2) | RXACTIVE},	/* RGMII1_RD2 */
	{OFFSET(mii1_rxd1), MODE(2) | RXACTIVE},	/* RGMII1_RD1 */
	{OFFSET(mii1_rxd0), MODE(2) | RXACTIVE},	/* RGMII1_RD0 */
	{-1},
};

static struct module_pin_mux mii1_pin_mux [] = {
        {OFFSET (mii1_crs), MODE (0) | RXACTIVE},
        {OFFSET (mii1_col), MODE (0) | RXACTIVE},
        {OFFSET (mii1_rxerr), MODE (0) | RXACTIVE},
        {OFFSET (mii1_txen), MODE (0)},
        {OFFSET (mii1_rxdv), MODE (0) | RXACTIVE},
        {OFFSET (mii1_txd3), MODE (0)},
        {OFFSET (mii1_txd2), MODE (0)},
        {OFFSET (mii1_txd1), MODE (0)},
        {OFFSET (mii1_txd0), MODE (0)},
        {OFFSET (mii1_txclk), MODE (0) | RXACTIVE},
        {OFFSET (mii1_rxclk), MODE (0) | RXACTIVE},
        {OFFSET (mii1_rxd3), MODE (0) | RXACTIVE},
        {OFFSET (mii1_rxd2), MODE (0) | RXACTIVE},
        {OFFSET (mii1_rxd1), MODE (0) | RXACTIVE},
        {OFFSET (mii1_rxd0), MODE (0) | RXACTIVE},
        {-1},
};

static struct module_pin_mux mii2_pin_mux [] = {
	{OFFSET (gpmc_be1n), MODE (1) | RXACTIVE},
	{OFFSET (gpmc_csn3), MODE (1) | RXACTIVE},
	{OFFSET (gpmc_wpn), MODE (1) | RXACTIVE},
	{OFFSET (gpmc_a0), MODE (1)},
	{OFFSET (gpmc_a1), MODE (1) | RXACTIVE},
	{OFFSET (gpmc_a6), MODE (1) | RXACTIVE},
	{OFFSET (gpmc_a7), MODE (1) | RXACTIVE},
	{OFFSET (gpmc_a5), MODE (1)},
	{OFFSET (gpmc_a4), MODE (1)},
	{OFFSET (gpmc_a3), MODE (1)},
	{OFFSET (gpmc_a2), MODE (1)},
	{OFFSET (gpmc_a11), MODE (1) | RXACTIVE},
	{OFFSET (gpmc_a10), MODE (1) | RXACTIVE},
	{OFFSET (gpmc_a9), MODE (1) | RXACTIVE},
	{OFFSET (gpmc_a8), MODE (1) | RXACTIVE},
	{-1},
};

static struct module_pin_mux mdio_pin_mux[] = {
	{OFFSET(mdio_data), MODE(0) | RXACTIVE | PULLUP_EN},/* MDIO_DATA */
	{OFFSET(mdio_clk), MODE(0) | PULLUP_EN},	/* MDIO_CLK */
	{-1},
};

static struct module_pin_mux uart0_pin_mux[] = {
	{OFFSET(uart0_rxd), (MODE(0) | PULLUP_EN | RXACTIVE | SLEWCTRL)},
	{OFFSET(uart0_txd), (MODE(0) | PULLUDDIS | PULLUP_EN | SLEWCTRL)},
	{-1},
};

static struct module_pin_mux mmc0_pin_mux[] = {
	{OFFSET(mmc0_clk), (MODE(0) | PULLUDDIS | RXACTIVE)},  /* MMC0_CLK */
	{OFFSET(mmc0_cmd), (MODE(0) | PULLUP_EN | RXACTIVE)},  /* MMC0_CMD */
	{OFFSET(mmc0_dat0), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* MMC0_DAT0 */
	{OFFSET(mmc0_dat1), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* MMC0_DAT1 */
	{OFFSET(mmc0_dat2), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* MMC0_DAT2 */
	{OFFSET(mmc0_dat3), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* MMC0_DAT3 */
	{-1},
};


static struct module_pin_mux mmc1_pin_mux[] = {
	{OFFSET(gpmc_csn1), (MODE(2) | PULLUDDIS | RXACTIVE)},  /* MMC1_CLK */
	{OFFSET(gpmc_csn2), (MODE(2) | PULLUP_EN | RXACTIVE)},  /* MMC1_CMD */
	{OFFSET(gpmc_ad0), (MODE(1) | PULLUP_EN | RXACTIVE)}, /* MMC1_DAT0 */
	{OFFSET(gpmc_ad1), (MODE(1) | PULLUP_EN | RXACTIVE)}, /* MMC1_DAT1 */
	{OFFSET(gpmc_ad2), (MODE(1) | PULLUP_EN | RXACTIVE)}, /* MMC1_DAT2 */
	{OFFSET(gpmc_ad3), (MODE(1) | PULLUP_EN | RXACTIVE)}, /* MMC1_DAT3 */
	{OFFSET(gpmc_ad4), (MODE(1) | PULLUP_EN | RXACTIVE)}, /* MMC1_DAT4 */
	{OFFSET(gpmc_ad5), (MODE(1) | PULLUP_EN | RXACTIVE)}, /* MMC1_DAT5 */
	{OFFSET(gpmc_ad6), (MODE(1) | PULLUP_EN | RXACTIVE)}, /* MMC1_DAT6 */
	{OFFSET(gpmc_ad7), (MODE(1) | PULLUP_EN | RXACTIVE)}, /* MMC1_DAT7 */
	{-1},
};


static struct module_pin_mux i2c0_pin_mux[] = {
	{OFFSET(i2c0_sda), (MODE(0) | PULLUP_EN | RXACTIVE | SLEWCTRL)},
	{OFFSET(i2c0_scl), (MODE(0) | PULLUP_EN | RXACTIVE | SLEWCTRL)},
	{-1},
};


void enable_uart0_pin_mux(void)
{
	configure_module_pin_mux(uart0_pin_mux);
}

void enable_board_pin_mux(void)
{
	configure_module_pin_mux(mmc0_pin_mux);
	configure_module_pin_mux(i2c0_pin_mux);
	configure_module_pin_mux(mdio_pin_mux);
	configure_module_pin_mux(mii1_pin_mux);
	configure_module_pin_mux(mii2_pin_mux);
	configure_module_pin_mux(mmc1_pin_mux);
/*
	if (board_is_evm()) {
		configure_module_pin_mux(gpio5_7_pin_mux);
		configure_module_pin_mux(rgmii1_pin_mux);
#if defined(CONFIG_NAND)
		configure_module_pin_mux(nand_pin_mux);
#endif
	} else if (board_is_sk() || board_is_idk()) {
		configure_module_pin_mux(mii1_pin_mux);
#if defined(CONFIG_NAND)
		printf("Error: NAND flash not present on this board\n");
#endif
		configure_module_pin_mux(qspi_pin_mux);
	} else if (board_is_eposevm()) {
		configure_module_pin_mux(rmii1_pin_mux);
#if defined(CONFIG_NAND)
		configure_module_pin_mux(nand_pin_mux);
#else
		configure_module_pin_mux(qspi_pin_mux);
#endif
	}
	*/
}

void enable_i2c0_pin_mux(void)
{
	configure_module_pin_mux(i2c0_pin_mux);
}

    

    Please can tell me the problem or any idea to solve it?
    

    I`ll try to refer to the document as you say.
    

    Thank you.
    
			
    

		
		
		
		
	
    
	
    
		
    
			
		
    
	
    

	            
                	
	
    
				
		                
                
                
                
                
                
                
        		
		
				
    
			
		
    
		
		 
		
		
     
    
	
    

    
			
    
			
    
		
    

		
    
	
    • 

		
	
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													0
							
			
				
									
							
						
				
			
			
			
												
						in reply to han hosung
					
									
    
	
    
	                                    
                      
    
                        
                          TI__Guru**
                        109330 points
                      
    
                          
                   		
		
    
					
    Hello Han,
    

    To confirm: You have EMMC connected on your board, but you are not able to see it from Linux?
    

    Did you also add the EMMC to the Linux device tree file?
    

    Regards,
    

    Nick
    
			
    

		
		
		
		
	
    
	
    
		
    
			
		
    
	
    

	            
                 	
	
    
				
		                
                
                
                
                
                
                
        		
		
				
    
			
		
    
		
		 
		
		
     
    
	
    

    
			
    
			
    
		
    

		
    
	
    • 

		
	
  • 
		
    
			 


	
		
	
	









    
	
    
		
    
							
					
    
		
    
			
													0
							
			
				
									
							
						
				
			
			
			
												
						in reply to Nick Saulnier
					
									
    
	
    
	                                    
                      
    
                        
                          Prodigy
                        20 points
                      
    
                          
                   		
		
    
					
    To confirm: You have EMMC connected on your board, but you are not able to see it from Linux?
    

    --> Exactly. I hope to see it.
    

    Did you also add the EMMC to the Linux device tree file?
    

    --> See below
    

    &am43xx_pinmux {
	mymmc2_pins_default: mymmc2_pins_default {
		pinctrl-single,pins = <
			AM4372_IOPAD(0x880, PIN_INPUT | MUX_MODE2) /* (B9) gpmc_csn1.mmc1_clk */
			AM4372_IOPAD(0x884, PIN_INPUT | MUX_MODE2) /* (F10) gpmc_csn2.mmc1_cmd */
			AM4372_IOPAD(0x800, PIN_INPUT | MUX_MODE1) /* (B5) gpmc_ad0.mmc1_dat0 */
			AM4372_IOPAD(0x804, PIN_INPUT | MUX_MODE1) /* (A5) gpmc_ad1.mmc1_dat1 */
			AM4372_IOPAD(0x808, PIN_INPUT | MUX_MODE1) /* (B6) gpmc_ad2.mmc1_dat2 */
			AM4372_IOPAD(0x80c, PIN_INPUT | MUX_MODE1) /* (A6) gpmc_ad3.mmc1_dat3 */
			AM4372_IOPAD(0x810, PIN_INPUT | MUX_MODE1) /* (B7) gpmc_ad4.mmc1_dat4 */
			AM4372_IOPAD(0x814, PIN_INPUT | MUX_MODE1) /* (A7) gpmc_ad5.mmc1_dat5 */
			AM4372_IOPAD(0x818, PIN_INPUT | MUX_MODE1) /* (C8) gpmc_ad6.mmc1_dat6 */
			AM4372_IOPAD(0x81c, PIN_INPUT | MUX_MODE1) /* (B8) gpmc_ad7.mmc1_dat7 */
		>;
	};
};

&mmc2 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&mymmc2_pins_default>;

	vmmc-supply = <&dcdc4>;
	bus-width = <8>;
	ti,non-removable;
};




    
			
    

		
		
		
		
	
    
	
    
		
    
			
		
    
	
    

	            
                	
	
    
				
		                
                
                
                
                
                
                
        		
		
				
    
			
		
    
		
		 
		
		
     
    
	
    

    
			
    
			
    
		
    

		
    
	
    • 

		
	
  • 
		
    
			 


	
		
	
	









    
	
    
		
    
							
					
    
		
    
			
													0
							
			
				
									
							
						
				
			
			
			
												
						in reply to han hosung
					
									
    
	
    
	                                    
                      
    
                        
                          TI__Guru**
                        109330 points
                      
    
                          
                   		
		
    
					
    Hello Han,
    

    Apologies for the delayed response. Let us know if you need additional assistance with this.
    

    Regards,
    

    Nick
    
			
    

		
		
		
		
	
    
	
    
		
    
			
		
    
	
    

	            
                 	
	
    
				
		                
                
                
                
                
                
                
        		
		
				
    
			
		
    
		
		 
		
		
     
    
	
    

    
			
    
			
    
		
    

		
    
	
    • 

		
	
  • 
		
    
			 


	
		
	
	









    
	
    
		
    
							
					
    
		
    
			
													0
							
			
				
									
							
						
				
			
			
			
												
						in reply to Nick Saulnier
					
									
    
	
    
	                                    
                      
    
                        
                          Prodigy
                        20 points
                      
    
                          
                   		
		
    
					
    Yes. Please guide me on using eMMC .
    
			
    

		
		
		
		
	
    
	
    
		
    
			
		
    
	
    

	            
                	
	
    
				
		                
                
                
                
                
                
                
        		
		
				
    
			
		
    
		
		 
		
		
     
    
	
    

    
			
    
			
    
		
    

		
    
	
    •