C6457 board routing and layout questions, SERDES and DDR.
We are going to be using the TMS320C6457CGMH2 DSP. SERDES implementation guide spraay1a.pdf Section 2.2 table 2 gives a minimum trace width of of 4mils for a 10inch trace. We are going to limit the trace length to 4inches or less. Can we use a trace width of 3.3-3.8mils? (probably 3.6mils) We wil be using 370HR(~FR4) material and 0.5oz copper ]
We are going to be using the TMS320C6457CGMH2 DSP. The DDR guidelines require a continuous ground plane. Our PCB will be ~3" square. I will need to use routing layers as small ground planes to get the number of controlled impedance layer needed for this route. TOP/GND1/SIG1/SIG2/GND2/BOT Can I route on SIG1 and add a GND3 puddle on the SIG2 layer?]
Thank you, Bryan Busacco