C674x 1.2V and 1.3V CVDD

Mike B

Other Parts Discussed in Thread: TMS320C6748, AM1808

Hello all,

We're considering making a board with population options to support either the -3 (375MHz) or -4 (456MHz) speed grades of the C6746 or C6748. Since we are not planning on using the RTC or having a variable core voltage, we had planned on connecting all the 1.2V static and 1.2V core pins together. The C6748 datasheet section 6.3.1 defines the static pins as: RVDD, VDDA_12_PLL0, VDDA_12_PLL1, USB_CVDD , and SATA_VDD. Furthermore we are not using USB or SATA.

I'm confused about which pins on the -4, 1.3V chip must be connected to the 1.3V rail? Here's what I was able to determine so far. Can someone please confirm these are the correct connections? Ideally we'd like to save the extra power supply circuitry and just connect everything to the CVDD rail. Is that permitted?

Pin	Connection on -4 Chip	Reference / notes
RVDD	1.3V	Section 3.8.27
PLL0_VDDA	1.2V	Section 3.8.2
PLL1_VDDA	1.2V	Section 3.8.2
USB_CVDD	1.2V	USB not used in application. Section 3.8.17
SATA_VDD	No Connect	SATA not used in application. For Rev B silicon, can be left disconnected.

I've also used this wiki page as a reference for unused pins: http://processors.wiki.ti.com/index.php/OMAP-L1x_Schematic_Review_Checklist#If_not_used

Many thanks,

Mike

over 14 years ago

0 BrandonAzbell over 14 years ago

TI__Guru 64560 points

For 456MHz operation, the RVDD and CVDD need to be 1.3V. The Recommended Operating Conditions section of the TMS320C6748 datasheet provides this information. Look for the 456MHz operation indicators.

0 Mike B over 14 years ago in reply to BrandonAzbell

Prodigy 120 points

Thanks, Brandon. How about the other pins (ie: PLL0 and PLL1). Do they still need to be at 1.2V, or can we increase them to 1.3V to match the CVDD and RVDD rails?

0 Mike B over 14 years ago in reply to Mike B

Prodigy 120 points

More to the point: That section of the datasheet indicates that we must connect the PLL0/1 and USB_CVDD supplies to 1.2V, even though CVDD=RVDD=1.3V. Is that correct?

0 BrandonAzbell over 14 years ago in reply to Mike B

TI__Guru 64560 points

Yes, that is correct.

I would also suggest that you review the silicon errata document to encompass any items that may have an implication on your design.

0 Matthew Linder over 14 years ago in reply to BrandonAzbell

Prodigy 90 points

Brandon, I have the same question, but for the AM1808. When you say "that is correct" do you mean the other pins such as USB_CVDD and SATA_VDD must still be 1.2V or can they also be tied to the 1.3V rail?

Thanks,

Matt

0 BrandonAzbell over 14 years ago in reply to Matthew Linder

TI__Guru 64560 points

Matthew Linder said:

Brandon, I have the same question, but for the AM1808. When you say "that is correct" do you mean the other pins such as USB_CVDD and SATA_VDD must still be 1.2V or can they also be tied to the 1.3V rail?

The datasheet of the AM1808, found on the AM1808 Product Folder, in the section 4.2 entitled "Recommended Operating Conditions" highlights that the variable power rails are CVDD, RVDD, DVDD3318_A, DVDD3318_B and DVDD3318_C. The rest of them are at a fixed voltage. The two you cited, USB_CVDD and SATA_VDD must still be at 1.2V.

0 Matthew Linder over 14 years ago in reply to BrandonAzbell

Prodigy 90 points

Brandon,

OK, thanks. I was looking at that table, but was confused because the ones you say should stay at 1.2V can go to 1.32V

It's the ones that can go to 1.35V that are the "variable" ones right? It's the NOM column I should be looking at I guess.

I assume it's not recommended to run the others at 1.3V even though they can go that high right?

Thanks,

Matt

0 BrandonAzbell over 14 years ago in reply to Matthew Linder

TI__Guru 64560 points

The range of 1.14V to 1.32V is accounting for possible power supply tolerance/variance. You are unlikely to implement a power supply design that is exactly on 1.3V with no variance across temperature and process.

0 Matthew Linder over 14 years ago in reply to BrandonAzbell

Prodigy 90 points

True, but why is running within 20mV of MAX too close to allow for variance due to temperature and process, but running within 50mV (for the variable rails with a 1.35V MAX) an acceptable tolerance? I guess I need to closely check my power supply design for the 1.3V rail to account for these variances or risk damage to the part.

Thanks,

Matt

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C674x 1.2V and 1.3V CVDD