DRA829V: CAN Response and Bootloader Demo Application failed to boot Linux

yan yan

Prodigy 215 points

Part Number: DRA829V

HI, CHAMPS:

SDK: Processor SDK RTOS J721E07_03_00

now i try on CAN Response and Bootloader Demo Application and attempt to boot linux following given descriptions:

Writing needed binaries to MMCSD

To run the default TI RTOS applications on all the main domain cores, copy the following binaries onto the MMCSD card:

coresdk_rtos_jacinto_xx_yy_xx_bb/pdk_jacinto_07.x.x/packages/ti/boot/sbl/binary/$board/cust/bin/sbl_mmcsd_img_mcu1_0_release.tiimage, rename to tiboot3.bin
coresdk_rtos_jacinto_xx_yy_xx_bb/pdk_jacinto_07.x.x/packages/ti/drv/sciclient/soc/V1/tifs.bin (for J721E)
coresdk_rtos_jacinto_xx_yy_xx_bb/mcusw/binary/can_boot_app_mcu_rtos/bin/$board/can_boot_app_mcu_rtos_mcu1_0_release.appimage, rename to app
coresdk_rtos_jacinto_xx_yy_xx_bb/mcusw/mcuss_demos/boot_app_mcu_rtos/main_domain_apps/binary/bin/<board/multicore_MCU2_0_MCU2_1_stage1.appimage, rename to lateapp1
J721E: coresdk_rtos_jacinto_xx_yy_xx_bb/mcusw/mcuss_demos/boot_app_mcu_rtos/main_domain_apps/binary/bin/<j721e_evm/multicore_DSPs_MCU3_0_MCU3_1_stage2.appimage, rename to lateapp2

To alternatively boot Linux on MPU1_0 (while still booting TI RTOS applications on the other main domain cores), also copy the following binaries onto the MMCSD card:

coresdk_rtos_jacinto_xx_yy_xx_bb/mcusw/mcuss_demos/boot_app_mcu_rtos/main_domain_apps/binary/bin/$board/atf_optee.appimage
coresdk_rtos_jacinto_xx_yy_xx_bb/mcusw/mcuss_demos/boot_app_mcu_rtos/main_domain_apps/binary/bin/$board/tidtb_linux.appimage
coresdk_rtos_jacinto_xx_yy_xx_bb/mcusw/mcuss_demos/boot_app_mcu_rtos/main_domain_apps/binary/bin/$board/tikernelimage_linux.appimage

Note that, for Linux/QNX binaries, the can_boot_app_mcu_rtos_mcu1_0_release.appimage will also need to be rebuilt, as described in Creating HLOS appimages for Linux or QNX, and copied again to the MMCSD card. For booting the remaining MAIN domain cores (other than A72), you can simply reuse the RTOS images that were built in an earlier step in the binaries: "multicore_MCU2_0_MCU2_1_stage1.appimage" & "multicore_DSPs_MCU3_0_MCU3_1_stage2.appimage".

but output serial log shows me like this,

it says that GTC_CNTFID0 equals 0, i have no any clues why this happens , please help me to figure this out, many thx.

over 4 years ago

0 Karan Saxena over 4 years ago

TI__Guru* 77774 points

Hi Yan Yan,

There was a typo in the documentation you are referring, instead of

coresdk_rtos_jacinto_xx_yy_xx_bb/pdk_jacinto_07.x.x/packages/ti/boot/sbl/binary/$board/cust/bin/sbl_mmcsd_img_mcu1_0_release.tiimage, rename to tiboot3.bin

it is

coresdk_rtos_jacinto_xx_yy_xx_bb/pdk_jacinto_07.x.x/packages/ti/boot/sbl/binary/$board/mmcsd/bin/sbl_mmcsd_img_mcu1_0_release.tiimage, rename to tiboot3.bin

Can you try the attached set of binaries? Replace them in the BOOT partition of your SD card.

5226.BOOT.zip

If these work then there is some issue with the setup on your side.

Regards,

Karan

0 yan yan over 4 years ago in reply to Karan Saxena

Prodigy 215 points

Hi Karan,

thanks for reply,

i have replaced the binaries with yours, and then the output logs as below.

please help me to figure this out that why linux boot failed.

NOTICE:  BL31: v2.4(release):07.03.00.005-dirty
NOTICE:  BL31: Built : 00:15:40, Apr 10 2021
ERROR:   GTC_CNTFID0 is 0! Assuming 200000000 Hz. Fix Bootloader
[    0.000000] Booting Linux on physical CPU 0x0000000000 [0x411fd080]
[    0.000000] Linux version 5.4.74-g9574bba32a (oe-user@oe-host) (gcc version 9.2.1 20191025 (GNU Toolchain for the A-profile Architecture 9.2-2019.12 (arm-9.10))) #1 SMP PREEMPT Mon Jan 25 04:03:30 UTC 2021
[    0.000000] Machine model: Texas Instruments K3 J721E SoC
[    0.000000] earlycon: ns16550a0 at MMIO32 0x0000000002800000 (options '')
[    0.000000] printk: bootconsole [ns16550a0] enabled
[    0.000000] Reserved memory: created DMA memory pool at 0x00000000a0000000, size 1 MiB
[    0.000000] OF: reserved mem: initialized node vision-apps-r5f-dma-memory@a0000000, compatible id shared-dma-pool
[    0.000000] Reserved memory: created DMA memory pool at 0x00000000a0100000, size 15 MiB
[    0.000000] OF: reserved mem: initialized node vision_apps-r5f-memory@a0100000, compatible id shared-dma-pool
[    0.000000] Reserved memory: created DMA memory pool at 0x00000000a1000000, size 1 MiB
[    0.000000] OF: reserved mem: initialized node vision-apps-r5f-dma-memory@a1000000, compatible id shared-dma-pool
[    0.000000] Reserved memory: created DMA memory pool at 0x00000000a1100000, size 15 MiB
[    0.000000] OF: reserved mem: initialized node vision-apps-r5f-memory@a1100000, compatible id shared-dma-pool
[    0.000000] Reserved memory: created DMA memory pool at 0x00000000a2000000, size 1 MiB
[    0.000000] OF: reserved mem: initialized node vision-apps-r5f-dma-memory@a2000000, compatible id shared-dma-pool
[    0.000000] Reserved memory: created DMA memory pool at 0x00000000a2100000, size 31 MiB
[    0.000000] OF: reserved mem: initialized node vision-apps-r5f-memory@a2100000, compatible id shared-dma-pool
[    0.000000] Reserved memory: created DMA memory pool at 0x00000000a4000000, size 1 MiB
[    0.000000] OF: reserved mem: initialized node vision-apps-r5f-dma-memory@a4000000, compatible id shared-dma-pool
[    0.000000] Reserved memory: created DMA memory pool at 0x00000000a4100000, size 31 MiB
[    0.000000] OF: reserved mem: initialized node vision-apps-r5f-memory@a4100000, compatible id shared-dma-pool
[    0.000000] Reserved memory: created DMA memory pool at 0x00000000a6000000, size 1 MiB
[    0.000000] OF: reserved mem: initialized node vision-apps-r5f-dma-memory@a6000000, compatible id shared-dma-pool
[    0.000000] Reserved memory: created DMA memory pool at 0x00000000a6100000, size 15 MiB
[    0.000000] OF: reserved mem: initialized node vision-apps-r5f-memory@a6100000, compatible id shared-dma-pool
[    0.000000] Reserved memory: created DMA memory pool at 0x00000000a7000000, size 1 MiB
[    0.000000] OF: reserved mem: initialized node vision-apps-r5f-dma-memory@a7000000, compatible id shared-dma-pool
[    0.000000] Reserved memory: created DMA memory pool at 0x00000000a7100000, size 15 MiB
[    0.000000] OF: reserved mem: initialized node vision-apps-r5f-memory@a7100000, compatible id shared-dma-pool
[    0.000000] Reserved memory: created DMA memory pool at 0x00000000a8000000, size 1 MiB
[    0.000000] OF: reserved mem: initialized node vision-apps-c66-dma-memory@a8000000, compatible id shared-dma-pool
[    0.000000] Reserved memory: created DMA memory pool at 0x00000000a8100000, size 15 MiB
[    0.000000] OF: reserved mem: initialized node vision-apps-c66-memory@a8100000, compatible id shared-dma-pool
[    0.000000] Reserved memory: created DMA memory pool at 0x00000000a9000000, size 1 MiB
[    0.000000] OF: reserved mem: initialized node vision-apps-c66-dma-memory@a9000000, compatible id shared-dma-pool
[    0.000000] Reserved memory: created DMA memory pool at 0x00000000a9100000, size 15 MiB
[    0.000000] OF: reserved mem: initialized node vision-apps-c66-memory@a9100000, compatible id shared-dma-pool
[    0.000000] Reserved memory: created DMA memory pool at 0x00000000aa000000, size 1 MiB
[    0.000000] OF: reserved mem: initialized node vision-apps-c71-dma-memory@aa000000, compatible id shared-dma-pool
[    0.000000] Reserved memory: created DMA memory pool at 0x00000000aa100000, size 79 MiB
[    0.000000] OF: reserved mem: initialized node vision-apps-c71-memory@aa100000, compatible id shared-dma-pool
[    0.000000] Reserved memory: created DMA memory pool at 0x00000000b2000000, size 96 MiB
[    0.000000] OF: reserved mem: initialized node vision-apps-dma-memory@b2000000, compatible id shared-dma-pool
[    0.000000] OF: reserved mem: initialized node vision_apps_shared-memories, compatible id dma-heap-carveout
[    0.000000] Reserved memory: created DMA memory pool at 0x00000000d8000000, size 576 MiB
[    0.000000] OF: reserved mem: initialized node vision-apps-core-heap-memory-lo@d8000000, compatible id shared-dma-pool
[    0.000000] Reserved memory: created DMA memory pool at 0x0000000880000000, size 1024 MiB
[    0.000000] OF: reserved mem: initialized node vision-apps-core-heap-memory-hi@880000000, compatible id shared-dma-pool
[    0.000000] cma: Failed to reserve 512 MiB
[    0.000000] psci: probing for conduit method from DT.
[    0.000000] psci: PSCIv1.1 detected in firmware.
[    0.000000] psci: Using standard PSCI v0.2 function IDs
[    0.000000] psci: Trusted OS migration not required
[    0.000000] psci: SMC Calling Convention v1.0
[    0.000000] percpu: Embedded 2 pages/cpu s48408 r8192 d74472 u131072
[    0.000000] Detected PIPT I-cache on CPU0
[    0.000000] CPU features: detected: GIC system register CPU interface
[    0.000000] CPU features: detected: EL2 vector hardening
[    0.000000] Built 1 zonelists, mobility grouping off.  Total pages: 20950
[    0.000000] Kernel command line: console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000 root=/dev/mmcblk1p2 rw rootfstype=ext4 rootwait
[    0.000000] Dentry cache hash table entries: 262144 (order: 5, 2097152 bytes, linear)
[    0.000000] Inode-cache hash table entries: 131072 (order: 4, 1048576 bytes, linear)
[    0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
[    0.000000] software IO TLB: mapped [mem 0x9a800000-0x9e800000] (64MB)
[    0.000000] Memory: 1539648K/1343488K available (9598K kernel code, 788K rwdata, 3840K rodata, 1664K init, 683K bss, 18446744073709355456K reserved, 0K cma-reserved)
[    0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1
[    0.000000] rcu: Preemptible hierarchical RCU implementation.
[    0.000000] rcu:     RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=2.
[    0.000000]  Tasks RCU enabled.
[    0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
[    0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=2
[    0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
[    0.000000] GICv3: GIC: Using split EOI/Deactivate mode
[    0.000000] GICv3: 960 SPIs implemented
[    0.000000] GICv3: 0 Extended SPIs implemented
[    0.000000] GICv3: Distributor has no Range Selector support
[    0.000000] GICv3: 16 PPIs implemented
[    0.000000] GICv3: no VLPI support, no direct LPI support
[    0.000000] GICv3: CPU0: found redistributor 0 region 0:0x0000000001900000
[    0.000000] ITS [mem 0x01820000-0x0182ffff]
[    0.000000] GIC: enabling workaround for ITS: Socionext Synquacer pre-ITS
[    0.000000] ITS@0x0000000001820000: allocated 1048576 Devices @8c0800000 (flat, esz 8, psz 64K, shr 0)
[    0.000000] ITS: using cache flushing for cmd queue
[    0.000000] GICv3: using LPI property table @0x00000008c00c0000
[    0.000000] GIC: using cache flushing for LPI property table
[    0.000000] GICv3: CPU0: using allocated LPI pending table @0x00000008c00d0000
[    0.000000] random: get_random_bytes called from start_kernel+0x2b8/0x43c with crng_init=0
[    0.000000] arch_timer: cp15 timer(s) running at 200.00MHz (phys).
[    0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2e2049d3e8, max_idle_ns: 440795210634 ns
[    0.000001] sched_clock: 56 bits at 200MHz, resolution 5ns, wraps every 4398046511102ns
[    0.008379] Console: colour dummy device 80x25
[    0.012939] Calibrating delay loop (skipped), value calculated using timer frequency.. 400.00 BogoMIPS (lpj=800000)
[    0.023609] pid_max: default: 32768 minimum: 301
[    0.028357] LSM: Security Framework initializing
[    0.033102] Mount-cache hash table entries: 8192 (order: 0, 65536 bytes, linear)
[    0.040668] Mountpoint-cache hash table entries: 8192 (order: 0, 65536 bytes, linear)
[    0.049658] ASID allocator initialised with 32768 entries
[    0.055235] rcu: Hierarchical SRCU implementation.
[    0.060262] Platform MSI: gic-its@1820000 domain created
[    0.065885] PCI/MSI: /bus@100000/interrupt-controller@1800000/gic-its@1820000 domain created
[    0.074687] smp: Bringing up secondary CPUs ...
ERROR:   GTC_CNTFID0 is 0! Assuming 200000000 Hz. Fix Bootloader
[    0.085585] Detected PIPT I-cache on CPU1
[    0.085608] GICv3: CPU1: found redistributor 1 region 0:0x0000000001920000
[    0.085617] GICv3: CPU1: using allocated LPI pending table @0x00000008c00e0000
[    0.085641] CPU1: Booted secondary processor 0x0000000001 [0x411fd080]
[    0.085686] smp: Brought up 1 node, 2 CPUs
[    0.115029] SMP: Total of 2 processors activated.
[    0.119834] CPU features: detected: 32-bit EL0 Support
[    0.125087] CPU features: detected: CRC32 instructions
[    0.136628] CPU: All CPU(s) started at EL2
[    0.140821] alternatives: patching kernel code
[    0.145854] devtmpfs: initialized
[    0.154092] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
[    0.164059] futex hash table entries: 512 (order: -1, 32768 bytes, linear)
[    0.171367] pinctrl core: initialized pinctrl subsystem
[    0.177106] NET: Registered protocol family 16
[    0.181826] DMA: preallocated 256 KiB pool for atomic allocations
[    0.188300] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
[    0.203796] HugeTLB registered 16.0 GiB page size, pre-allocated 0 pages
[    0.210651] HugeTLB registered 512 MiB page size, pre-allocated 0 pages
[    0.217412] HugeTLB registered 2.00 MiB page size, pre-allocated 0 pages
[    0.224909] cryptd: max_cpu_qlen set to 1000
[    0.230917] vsys_3v3: supplied by evm_12v0
[    0.235226] vsys_5v0: supplied by evm_12v0
[    0.239768] iommu: Default domain type: Translated 
[    0.244938] SCSI subsystem initialized
[    0.249018] mc: Linux media interface: v0.10
[    0.253387] videodev: Linux video capture interface: v2.00
[    0.258997] pps_core: LinuxPPS API ver. 1 registered
[    0.264067] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
[    0.273404] PTP clock support registered
[    0.277415] EDAC MC: Ver: 3.0.0
[    0.281111] FPGA manager framework
[    0.284620] Advanced Linux Sound Architecture Driver Initialized.
[    0.291208] clocksource: Switched to clocksource arch_sys_counter
[    0.297514] VFS: Disk quotas dquot_6.6.0
[    0.301556] VFS: Dquot-cache hash table entries: 8192 (order 0, 65536 bytes)
[    0.310969] Carveout Heap: Exported 512 MiB at 0x00000000b8000000
[    0.317201] thermal_sys: Registered thermal governor 'step_wise'
[    0.317202] thermal_sys: Registered thermal governor 'power_allocator'
[    0.323615] NET: Registered protocol family 2
[    0.334960] tcp_listen_portaddr_hash hash table entries: 4096 (order: 0, 65536 bytes, linear)
[    0.343719] TCP established hash table entries: 16384 (order: 1, 131072 bytes, linear)
[    0.351864] TCP bind hash table entries: 16384 (order: 2, 262144 bytes, linear)
[    0.359478] TCP: Hash tables configured (established 16384 bind 16384)
[    0.366185] UDP hash table entries: 2048 (order: 0, 65536 bytes, linear)
[    0.373072] UDP-Lite hash table entries: 2048 (order: 0, 65536 bytes, linear)
[    0.380452] NET: Registered protocol family 1
[    0.385110] RPC: Registered named UNIX socket transport module.
[    0.391168] RPC: Registered udp transport module.
[    0.395973] RPC: Registered tcp transport module.
[    0.400777] RPC: Registered tcp NFSv4.1 backchannel transport module.
[    0.407361] PCI: CLS 0 bytes, default 64
[    0.411647] hw perfevents: enabled with armv8_pmuv3 PMU driver, 7 counters available
[    0.421388] Initialise system trusted keyrings
[    0.425993] workingset: timestamp_bits=46 max_order=15 bucket_order=0
[    0.434531] squashfs: version 4.0 (2009/01/31) Phillip Lougher
[    0.440715] NFS: Registering the id_resolver key type
[    0.445885] Key type id_resolver registered
[    0.450155] Key type id_legacy registered
[    0.454251] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
[    0.461227] 9p: Installing v9fs 9p2000 file system support
[    0.474092] Key type asymmetric registered
[    0.478287] Asymmetric key parser 'x509' registered
[    0.483289] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 244)
[    0.490849] io scheduler mq-deadline registered
[    0.495475] io scheduler kyber registered
[    0.500648] pinctrl-single 4301c000.pinmux: 94 pins, size 376
[    0.506722] pinctrl-single 11c000.pinmux: 173 pins, size 692
[    0.514838] k3-ringacc 2b800000.ringacc: Failed to get MSI domain
[    0.521121] k3-ringacc 3c000000.ringacc: Failed to get MSI domain
[    0.527458] ti-pat 31010000.pat: Found PAT Rev 1.0 with 16384 pages
[    0.533870] debugfs: Directory '31010000.pat' with parent 'regmap' already present!
[    0.541826] ti-pat 31011000.pat: Found PAT Rev 1.0 with 16384 pages
[    0.548240] debugfs: Directory '31011000.pat' with parent 'regmap' already present!
[    0.556158] ti-pat 31012000.pat: Found PAT Rev 1.0 with 16384 pages
[    0.562572] debugfs: Directory '31012000.pat' with parent 'regmap' already present!
[    0.570485] ti-pat 31013000.pat: Found PAT Rev 1.0 with 2048 pages
[    0.576808] debugfs: Directory '31013000.pat' with parent 'regmap' already present!
[    0.584721] ti-pat 31014000.pat: Found PAT Rev 1.0 with 2048 pages
[    0.591043] debugfs: Directory '31014000.pat' with parent 'regmap' already present!
[    0.600367] Serial: 8250/16550 driver, 10 ports, IRQ sharing enabled
[    0.612172] brd: module loaded
[    0.618006] loop: module loaded
[    0.622622] libphy: Fixed MDIO Bus: probed
[    0.626990] tun: Universal TUN/TAP device driver, 1.6
[    0.632412] igbvf: Intel(R) Gigabit Virtual Function Network Driver - version 2.4.0-k
[    0.640420] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
[    0.646486] sky2: driver version 1.30
[    0.650723] VFIO - User Level meta-driver version: 0.3
[    0.656341] i2c /dev entries driver
[    0.660432] sdhci: Secure Digital Host Controller Interface driver
[    0.666747] sdhci: Copyright(c) Pierre Ossman
[    0.671410] sdhci-pltfm: SDHCI platform and OF driver helper
[    0.677668] ledtrig-cpu: registered to indicate activity on CPUs
[    0.684413] optee: probing for conduit method from DT.
[    0.689676] optee: revision 3.11 (c4def2a8)
[    0.689961] optee: initialized driver
[    0.698752] NET: Registered protocol family 17
[    0.703366] 9pnet: Installing 9P2000 support
[    0.707751] Key type dns_resolver registered
[    0.712239] registered taskstats version 1
[    0.716425] Loading compiled-in X.509 certificates
[    0.724966] k3-ringacc 2b800000.ringacc: Failed to get MSI domain
[    0.731296] k3-ringacc 3c000000.ringacc: Failed to get MSI domain
[    0.738983] ti-sci 44083000.dmsc: ABI: 3.1 (firmware rev 0x0015 '21.1.1--v2021.01a (Terrific Lla')
[    0.757731] random: fast init done
[    0.777742] davinci-mcasp 2ba0000.mcasp: IRQ common not found
[    0.784922] omap_i2c 40b00000.i2c: bus 0 rev0.12 at 100 kHz
[    0.790848] omap_i2c 40b10000.i2c: bus 1 rev0.12 at 100 kHz
[    0.796763] omap_i2c 42120000.i2c: bus 2 rev0.12 at 100 kHz
[    0.802785] pca953x 3-0020: 3-0020 supply vcc not found, using dummy regulator
[    0.810208] pca953x 3-0020: using no AI
[    0.835249] pca953x 3-0020: failed writing register
[    0.840286] pca953x: probe of 3-0020 failed with error -121
[    0.846082] pca953x 3-0022: 3-0022 supply vcc not found, using dummy regulator
[    0.853483] pca953x 3-0022: using AI
[    0.857178] pca953x 3-0022: failed writing register
[    0.862185] pca953x: probe of 3-0022 failed with error -121
[    0.867911] omap_i2c 2000000.i2c: bus 3 rev0.12 at 400 kHz
[    0.874530] omap_i2c 2020000.i2c: bus 4 rev0.12 at 400 kHz
[    0.880449] pca953x 5-0020: 5-0020 supply vcc not found, using dummy regulator
[    0.887856] pca953x 5-0020: using no AI
[    0.915274] pca953x 5-0020: failed writing register
[    0.920299] pca953x: probe of 5-0020 failed with error -121
[    0.926086] omap_i2c 2030000.i2c: bus 5 rev0.12 at 400 kHz
[    0.931923] omap_i2c 2040000.i2c: bus 6 rev0.12 at 100 kHz
[    0.937760] omap_i2c 2050000.i2c: bus 7 rev0.12 at 100 kHz
[    0.944004] ti-sci-intr bus@100000:bus@28380000:interrupt-controller2: Interrupt Router 137 domain created
[    0.953939] ti-sci-intr bus@100000:interrupt-controller0: Interrupt Router 131 domain created
[    0.962713] ti-sci-intr bus@100000:navss@30000000:interrupt-controller1: Interrupt Router 213 domain created
[    0.972856] ti-sci-inta 33d00000.interrupt-controller: Interrupt Aggregator domain 209 created
[    0.989347] k3-ringacc 2b800000.ringacc: Ring Accelerator probed rings:286, gp-rings[96,20] sci-dev-id:235
[    0.999238] k3-ringacc 2b800000.ringacc: dma-ring-reset-quirk: disabled
[    1.005998] k3-ringacc 2b800000.ringacc: RA Proxy rev. 66346100, num_proxies:64
[    1.014833] k3-ringacc 3c000000.ringacc: Ring Accelerator probed rings:1024, gp-rings[440,150] sci-dev-id:211
[    1.024984] k3-ringacc 3c000000.ringacc: dma-ring-reset-quirk: disabled
[    1.031742] k3-ringacc 3c000000.ringacc: RA Proxy rev. 66346100, num_proxies:64
[    1.039552] 40a00000.serial: ttyS1 at MMIO 0x40a00000 (irq = 7, base_baud = 6000000) is a 8250
[    1.048681] 2800000.serial: ttyS2 at MMIO 0x2800000 (irq = 22, base_baud = 3000000) is a 8250
[    1.057421] printk: console [ttyS2] enabled
[    1.057421] printk: console [ttyS2] enabled
[    1.065856] printk: bootconsole [ns16550a0] disabled
[    1.065856] printk: bootconsole [ns16550a0] disabled
[    1.076194] 2810000.serial: ttyS3 at MMIO 0x2810000 (irq = 23, base_baud = 3000000) is a 8250
[    1.084997] 2840000.serial: ttyS6 at MMIO 0x2840000 (irq = 24, base_baud = 3000000) is a 8250
[    1.093772] arm-smmu-v3 36600000.smmu: ias 48-bit, oas 48-bit (features 0x00001faf)
[    1.102477] arm-smmu-v3 36600000.smmu: allocated 524288 entries for cmdq
[    1.111055] arm-smmu-v3 36600000.smmu: allocated 524288 entries for evtq
[    1.118468] arm-smmu-v3 36600000.smmu: msi_domain absent - falling back to wired irqs
[    1.127074] cdns-ufshcd 4e84000.ufs: ufshcd_populate_vreg: Unable to find vdd-hba-supply regulator, assuming enabled
[    1.137583] cdns-ufshcd 4e84000.ufs: ufshcd_populate_vreg: Unable to find vcc-supply regulator, assuming enabled
[    1.147734] cdns-ufshcd 4e84000.ufs: ufshcd_populate_vreg: Unable to find vccq-supply regulator, assuming enabled
[    1.157972] cdns-ufshcd 4e84000.ufs: ufshcd_populate_vreg: Unable to find vccq2-supply regulator, assuming enabled
[    1.168537] scsi host0: ufshcd
[    1.211223] davinci_mdio 46000f00.mdio: davinci mdio revision 9.7, bus freq 1000000
[    1.218867] libphy: 46000f00.mdio: probed
[    1.223077] mdio_bus 46000f00.mdio: MDIO device at address 0 is missing.
[    1.229778] am65-cpsw-nuss 46000000.ethernet: initializing am65 cpsw nuss version 0x6BA00101, cpsw version 0x6BA80100 Ports: 2 quirks:00000000
[    1.242577] am65-cpsw-nuss 46000000.ethernet: Failed to request tx dma channel -517
[    1.250972] am65-cpts 310d0000.cpts: CPTS ver 0x4e8a010a, freq:200000000, add_val:4 pps:0
[    1.259445] mmc0: CQHCI version 5.10
[    1.303800] mmc0: SDHCI controller on 4f80000.sdhci [4f80000.sdhci] using ADMA 64-bit
[    1.312264] davinci-mcasp 2ba0000.mcasp: IRQ common not found
[    1.323171] omap-mailbox 31f80000.mailbox: omap mailbox rev 0x66fc7100
[    1.330020] omap-mailbox 31f81000.mailbox: omap mailbox rev 0x66fc7100
[    1.336842] omap-mailbox 31f82000.mailbox: omap mailbox rev 0x66fc7100
[    1.343669] omap-mailbox 31f83000.mailbox: omap mailbox rev 0x66fc7100
[    1.350465] omap-mailbox 31f84000.mailbox: omap mailbox rev 0x66fc7100
[    1.360271] ti-udma 285c0000.dma-controller: Channels: 26 (tchan: 13, rchan: 13, gp-rflow: 8)
[    1.370188] ti-udma 31150000.dma-controller: Channels: 84 (tchan: 42, rchan: 42, gp-rflow: 16)
[    1.382057] spi-nor spi0.0: unrecognized JEDEC id bytes: ff ff ff ff ff ff
[    1.388934] spi-nor: probe of spi0.0 failed with error -2
[    1.396060] spi-nor spi1.0: Failed to parse optional parameter table: ff81
[    1.402980] spi-nor spi1.0: s25fs512s (65536 Kbytes)
[    1.447212] davinci_mdio 46000f00.mdio: davinci mdio revision 9.7, bus freq 1000000
[    1.454869] libphy: 46000f00.mdio: probed
[    1.459095] mdio_bus 46000f00.mdio: MDIO device at address 0 is missing.
[    1.465807] am65-cpsw-nuss 46000000.ethernet: initializing am65 cpsw nuss version 0x6BA00101, cpsw version 0x6BA80100 Ports: 2 quirks:00000000
[    1.479446] am65-cpsw-nuss 46000000.ethernet: set new flow-id-base 48
[    1.486325] am65-cpsw-nuss 46000000.ethernet: initialized cpsw ale version 57.4
[    1.493661] am65-cpsw-nuss 46000000.ethernet: ALE Table size 64
[    1.499915] am65-cpsw-nuss 46000000.ethernet: CPTS ver 0x4e8a010a, freq:500000000, add_val:1 pps:0
[    1.509951] mmc0: Command Queue Engine enabled
[    1.514397] mmc0: new HS200 MMC card at address 0001
[    1.519872] davinci-mcasp 2ba0000.mcasp: IRQ common not found
[    1.525829] mmcblk0: mmc0:0001 S0J57X 29.6 GiB 
[    1.530460] mmcblk0boot0: mmc0:0001 S0J57X partition 1 31.5 MiB
[    1.536603] mmcblk0boot1: mmc0:0001 S0J57X partition 2 31.5 MiB
[    1.542617] mmcblk0rpmb: mmc0:0001 S0J57X partition 3 4.00 MiB, chardev (240:0)
[    1.557989] debugfs: Directory 'pd:242' with parent 'pm_genpd' already present!
[    1.565384] debugfs: Directory 'pd:241' with parent 'pm_genpd' already present!
[    1.572699] debugfs: Directory 'pd:240' with parent 'pm_genpd' already present!
[    1.580044] debugfs: Directory 'pd:239' with parent 'pm_genpd' already present!
[    1.588168] input: gpio-keys as /devices/platform/gpio-keys/input/input0
[    1.595591] hctosys: unable to open rtc device (rtc0)
[    1.595991] cdns-ufshcd 4e84000.ufs: link startup failed 1
[    1.606112] cdns-ufshcd 4e84000.ufs: UFS Host state=0
[    1.607584] ALSA device list:
[    1.611152] cdns-ufshcd 4e84000.ufs: lrb in use=0x0, outstanding reqs=0x0 tasks=0x0
[    1.614107]   No soundcards found.
[    1.621744] cdns-ufshcd 4e84000.ufs: saved_err=0x0, saved_uic_err=0x0
[    1.631560] cdns-ufshcd 4e84000.ufs: Device power mode=1, UIC link state=0
[    1.638421] cdns-ufshcd 4e84000.ufs: PM in progress=0, sys. suspended=0
[    1.645020] cdns-ufshcd 4e84000.ufs: Auto BKOPS=0, Host self-block=0
[    1.651359] cdns-ufshcd 4e84000.ufs: Clk gate=1
[    1.655878] cdns-ufshcd 4e84000.ufs: error handling flags=0x0, req. abort count=0
[    1.663345] cdns-ufshcd 4e84000.ufs: Host capabilities=0x1587031f, caps=0x0
[    1.670289] cdns-ufshcd 4e84000.ufs: quirks=0x0, dev. quirks=0x0
[    1.676282] cdns-ufshcd 4e84000.ufs: ufshcd_print_pwr_info:[RX, TX]: gear=[0, 0], lane[0, 0], pwr[INVALID MODE, INVALID MODE], rate = 0
[    1.688443] host_regs: 00000000: 1587031f 00000000 00000210 00000000
[    1.694782] host_regs: 00000010: 00000000 00000000 00000000 00000000
[    1.701120] host_regs: 00000020: 00000000 00000470 00000000 00000000
[    1.707457] host_regs: 00000030: 00000008 00000001 00000000 00000000
[    1.713795] host_regs: 00000040: 00000000 00000000 00000000 00000000
[    1.720132] host_regs: 00000050: 00000000 00000000 00000000 00000000
[    1.726469] host_regs: 00000060: 00000000 00000000 00000000 00000000
[    1.732807] host_regs: 00000070: 00000000 00000000 00000000 00000000
[    1.739144] host_regs: 00000080: 00000000 00000000 00000000 00000000
[    1.745481] host_regs: 00000090: 00000000 00000000 00000000 00000000
[    1.751819] cdns-ufshcd 4e84000.ufs: hba->ufs_version = 0x210, hba->capabilities = 0x1587031f
[    1.760323] cdns-ufshcd 4e84000.ufs: hba->outstanding_reqs = 0x0, hba->outstanding_tasks = 0x0
[    1.768917] cdns-ufshcd 4e84000.ufs: last_hibern8_exit_tstamp at 0 us, hibern8_exit_cnt = 0
[    1.777251] cdns-ufshcd 4e84000.ufs: No record of pa_err errors
[    1.783158] cdns-ufshcd 4e84000.ufs: No record of dl_err errors
[    1.789062] cdns-ufshcd 4e84000.ufs: No record of nl_err errors
[    1.794966] cdns-ufshcd 4e84000.ufs: No record of tl_err errors
[    1.800869] cdns-ufshcd 4e84000.ufs: No record of dme_err errors
[    1.806860] cdns-ufshcd 4e84000.ufs: No record of auto_hibern8_err errors
[    1.813631] cdns-ufshcd 4e84000.ufs: No record of fatal_err errors
[    1.819796] cdns-ufshcd 4e84000.ufs: link_startup_fail[0] = 0x1 at 1516788 us
[    1.826913] cdns-ufshcd 4e84000.ufs: No record of resume_fail errors
[    1.833251] cdns-ufshcd 4e84000.ufs: No record of suspend_fail errors
[    1.839674] cdns-ufshcd 4e84000.ufs: No record of dev_reset errors
[    1.845838] cdns-ufshcd 4e84000.ufs: No record of host_reset errors
[    1.852090] cdns-ufshcd 4e84000.ufs: No record of task_abort errors
[    1.858340] cdns-ufshcd 4e84000.ufs: clk: core_clk, rate: 250000000
[    1.864591] cdns-ufshcd 4e84000.ufs: clk: phy_clk, rate: 19200000
[    1.870671] cdns-ufshcd 4e84000.ufs: clk: ref_clk, rate: 19200000
[    1.876914] Waiting for root device /dev/mmcblk1p2...
[   31.791219] tlv71033: disabling

Regards,

Yan

0 Karan Saxena over 4 years ago in reply to yan yan

TI__Guru* 77774 points

Hi,

The logs show that the file system is not loading. Do you have a valid file system in the SD card?

Regards,

Karan

0 yan yan over 4 years ago in reply to Karan Saxena

Prodigy 215 points

Hi Karan,

Before I replace the files residing in BOOT partition, the system can start normally(uboot -> kernel);

after i replaced the BOOT partition files, the system boot failed.

i thought the file system should be valid.

below picture shows the file structures in SD card.

Regards,

Yan

0 Karan Saxena over 4 years ago in reply to yan yan

TI__Guru* 77774 points

Hi Yan,

With u-boot your parameters will be read from u-boot environment. With boot app there is no u-boot and hence the Device Tree is used for passing the boot args. Can you send you a patch on your Device Tree, what did you change on top of the SDK or did you not change anything?

Regards,

Karan

0 yan yan over 4 years ago in reply to Karan Saxena

Prodigy 215 points

Hi Karan,

i just add some log messages, here is the DTS file that i applied.

// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/
 */

/dts-v1/;

#include "k3-j721e-som-p0.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/sound/ti-mcasp.h>
#include <dt-bindings/net/ti-dp83867.h>

/ {
	chosen {
		stdout-path = "serial2:115200n8";
		bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000,root=/dev/mmcblk1p2 rw rootwait";
	};

	gpio_keys: gpio-keys {
		compatible = "gpio-keys";
		autorepeat;
		pinctrl-names = "default";
		pinctrl-0 = <&sw10_button_pins_default &sw11_button_pins_default>;

		sw10: sw10 {
			label = "GPIO Key USER1";
			linux,code = <BTN_0>;
			gpios = <&main_gpio0 0 GPIO_ACTIVE_LOW>;
		};

		sw11: sw11 {
			label = "GPIO Key USER2";
			linux,code = <BTN_1>;
			gpios = <&wkup_gpio0 7 GPIO_ACTIVE_LOW>;
		};
	};

	evm_12v0: fixedregulator-evm12v0 {
		/* main supply */
		compatible = "regulator-fixed";
		regulator-name = "evm_12v0";
		regulator-min-microvolt = <12000000>;
		regulator-max-microvolt = <12000000>;
		regulator-always-on;
		regulator-boot-on;
	};

	vsys_3v3: fixedregulator-vsys3v3 {
		/* Output of LMS140 */
		compatible = "regulator-fixed";
		regulator-name = "vsys_3v3";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		vin-supply = <&evm_12v0>;
		regulator-always-on;
		regulator-boot-on;
	};

	vsys_5v0: fixedregulator-vsys5v0 {
		/* Output of LM5140 */
		compatible = "regulator-fixed";
		regulator-name = "vsys_5v0";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		vin-supply = <&evm_12v0>;
		regulator-always-on;
		regulator-boot-on;
	};

	/* Used for 48KHz family */
	pll4: pll4_fixed {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-frequency = <1179648000>;
	};

	/* Used for 44.1KHz family */
	pll15: pll15_fixed {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-frequency = <1083801600>;
	};

	sound0: sound@0 {
		compatible = "ti,j721e-cpb-audio";
		ti,model = "j721e-cpb-analog";

		ti,cpb-mcasp = <&mcasp10>;
		ti,cpb-codec = <&pcm3168a_1>;

		clocks = <&pll4>, <&pll15>,
			 <&k3_clks 184 1>,
			 <&k3_clks 184 2>, <&k3_clks 184 4>,
			 <&k3_clks 157 371>,
			 <&k3_clks 157 400>, <&k3_clks 157 401>;
		clock-names = "pll4", "pll15",
			      "cpb-mcasp",
			      "cpb-mcasp-48000", "cpb-mcasp-44100",
			      "audio-refclk2",
			      "audio-refclk2-48000", "audio-refclk2-44100";
	};

	vdd_mmc1: fixedregulator-sd {
		compatible = "regulator-fixed";
		regulator-name = "vdd_mmc1";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-boot-on;
		enable-active-high;
		vin-supply = <&vsys_3v3>;
		gpio = <&exp2 2 GPIO_ACTIVE_HIGH>;
	};

	vdd_sd_dv_alt: gpio-regulator-TLV71033 {
		compatible = "regulator-gpio";
		pinctrl-names = "default";
		pinctrl-0 = <&vdd_sd_dv_alt_pins_default>;
		regulator-name = "tlv71033";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <3300000>;
		regulator-boot-on;
		vin-supply = <&vsys_5v0>;
		gpios = <&main_gpio0 117 GPIO_ACTIVE_HIGH>;
		states = <1800000 0x0
			  3300000 0x1>;
	};

	cpsw9g_virt_mac: main_r5fss_cpsw9g_virt_mac0 {
		compatible = "ti,j721e-cpsw-virt-mac";
		dma-coherent;
		ti,psil-base = <0x4a00>;
		ti,remote-name = "mpu_1_0_ethswitch-device-0";

		dmas = <&main_udmap 0xca00>,
		       <&main_udmap 0xca01>,
		       <&main_udmap 0xca02>,
		       <&main_udmap 0xca03>,
		       <&main_udmap 0xca04>,
		       <&main_udmap 0xca05>,
		       <&main_udmap 0xca06>,
		       <&main_udmap 0xca07>,
		       <&main_udmap 0x4a00>;
		dma-names = "tx0", "tx1", "tx2", "tx3",
			    "tx4", "tx5", "tx6", "tx7",
			    "rx";

		virt_emac_port {
			ti,label = "virt-port";
			/* local-mac-address = [0 0 0 0 0 0]; */
		};
	};

	dp0: connector {
		compatible = "dp-connector";
		label = "DP0";

		port {
			dp_connector_in: endpoint {
				remote-endpoint = <&dp_bridge_output>;
			};
		};
	};

	clk_ov5640_fixed: ov5640-xclk {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <25000000>;
	};
};

&main_pmx0 {
	sw10_button_pins_default: sw10_button_pins_default {
		pinctrl-single,pins = <
			J721E_IOPAD(0x0, PIN_INPUT, 7) /* (AC18) EXTINTn.GPIO0_0 */
		>;
	};

	dp0_pins_default: dp0_pins_default {
		pinctrl-single,pins = <
			J721E_IOPAD(0x1c4, PIN_INPUT, 5) /* SPI0_CS1.DP0_HPD */
		>;
	};

	main_i2c1_exp4_pins_default: main-i2c1-exp4-pins-default {
		pinctrl-single,pins = <
			J721E_IOPAD(0x230, PIN_INPUT, 7) /* (U2) ECAP0_IN_APWM_OUT.GPIO1_11 */
		>;
	};

	main_i2c0_pins_default: main-i2c0-pins-default {
		pinctrl-single,pins = <
			J721E_IOPAD(0x220, PIN_INPUT_PULLUP, 0) /* (AC5) I2C0_SCL */
			J721E_IOPAD(0x224, PIN_INPUT_PULLUP, 0) /* (AA5) I2C0_SDA */
		>;
	};

	main_i2c1_pins_default: main-i2c1-pins-default {
		pinctrl-single,pins = <
			J721E_IOPAD(0x228, PIN_INPUT_PULLUP, 0) /* (Y6) I2C1_SCL */
			J721E_IOPAD(0x22c, PIN_INPUT_PULLUP, 0) /* (AA6) I2C1_SDA */
		>;
	};

	main_i2c2_pins_default: main-i2c2-pins-default {
		pinctrl-single,pins = <
			J721E_IOPAD(0x1c8, PIN_INPUT_PULLUP, 2) /* (AB5) SPI0_CLK.I2C2_SCL */
			J721E_IOPAD(0x1cc, PIN_INPUT_PULLUP, 2) /* (AA1) SPI0_D0.I2C2_SDA */
		>;
	};

	main_i2c3_pins_default: main-i2c3-pins-default {
		pinctrl-single,pins = <
			J721E_IOPAD(0x270, PIN_INPUT_PULLUP, 4) /* (T26) MMC2_CLK.I2C3_SCL */
			J721E_IOPAD(0x274, PIN_INPUT_PULLUP, 4) /* (T25) MMC2_CMD.I2C3_SDA */
		>;
	};

	main_i2c6_pins_default: main-i2c6-pins-default {
		pinctrl-single,pins = <
			J721E_IOPAD(0x1d0, PIN_INPUT_PULLUP, 2) /* (AA3) SPI0_D1.I2C6_SCL */
			J721E_IOPAD(0x1e4, PIN_INPUT_PULLUP, 2) /* (Y2) SPI1_D1.I2C6_SDA */
		>;
	};

	mcasp10_pins_default: mcasp10_pins_default {
		pinctrl-single,pins = <
			J721E_IOPAD(0x158, PIN_OUTPUT_PULLDOWN, 12) /* (U23) RGMII5_TX_CTL.MCASP10_ACLKX */
			J721E_IOPAD(0x15c, PIN_OUTPUT_PULLDOWN, 12) /* (U26) RGMII5_RX_CTL.MCASP10_AFSX */
			J721E_IOPAD(0x160, PIN_OUTPUT_PULLDOWN, 12) /* (V28) RGMII5_TD3.MCASP10_AXR0 */
			J721E_IOPAD(0x164, PIN_OUTPUT_PULLDOWN, 12) /* (V29) RGMII5_TD2.MCASP10_AXR1 */
			J721E_IOPAD(0x170, PIN_OUTPUT_PULLDOWN, 12) /* (U29) RGMII5_TXC.MCASP10_AXR2 */
			J721E_IOPAD(0x174, PIN_OUTPUT_PULLDOWN, 12) /* (U25) RGMII5_RXC.MCASP10_AXR3 */
			J721E_IOPAD(0x198, PIN_INPUT_PULLDOWN, 12) /* (V25) RGMII6_TD1.MCASP10_AXR4 */
			J721E_IOPAD(0x19c, PIN_INPUT_PULLDOWN, 12) /* (W27) RGMII6_TD0.MCASP10_AXR5 */
			J721E_IOPAD(0x1a0, PIN_INPUT_PULLDOWN, 12) /* (W29) RGMII6_TXC.MCASP10_AXR6 */
		>;
	};

	audi_ext_refclk2_pins_default: audi_ext_refclk2_pins_default {
		pinctrl-single,pins = <
			J721E_IOPAD(0x1a4, PIN_OUTPUT, 3) /* (W26) RGMII6_RXC.AUDIO_EXT_REFCLK2 */
		>;
	};

	main_mmc1_pins_default: main_mmc1_pins_default {
		pinctrl-single,pins = <
			J721E_IOPAD(0x254, PIN_INPUT, 0) /* (R29) MMC1_CMD */
			J721E_IOPAD(0x250, PIN_INPUT, 0) /* (P25) MMC1_CLK */
			J721E_IOPAD(0x2ac, PIN_INPUT, 0) /* (P25) MMC1_CLKLB */
			J721E_IOPAD(0x24c, PIN_INPUT, 0) /* (R24) MMC1_DAT0 */
			J721E_IOPAD(0x248, PIN_INPUT, 0) /* (P24) MMC1_DAT1 */
			J721E_IOPAD(0x244, PIN_INPUT, 0) /* (R25) MMC1_DAT2 */
			J721E_IOPAD(0x240, PIN_INPUT, 0) /* (R26) MMC1_DAT3 */
			J721E_IOPAD(0x258, PIN_INPUT, 0) /* (P23) MMC1_SDCD */
			J721E_IOPAD(0x25c, PIN_INPUT, 0) /* (R28) MMC1_SDWP */
		>;
	};

	vdd_sd_dv_alt_pins_default: vdd_sd_dv_alt_pins_default {
		pinctrl-single,pins = <
			J721E_IOPAD(0x1d8, PIN_INPUT, 7) /* (W4) SPI1_CS1.GPIO0_117 */
		>;
	};

	main_usbss0_pins_default: main_usbss0_pins_default {
		pinctrl-single,pins = <
			J721E_IOPAD(0x290, PIN_OUTPUT, 0) /* (U6) USB0_DRVVBUS */
			J721E_IOPAD(0x210, PIN_INPUT, 7) /* (W3) MCAN1_RX.GPIO1_3 */
		>;
	};

	main_usbss1_pins_default: main_usbss1_pins_default {
		pinctrl-single,pins = <
			J721E_IOPAD(0x214, PIN_OUTPUT, 4) /* (V4) MCAN1_TX.USB1_DRVVBUS */
		>;
	};
};

&wkup_pmx0 {
	sw11_button_pins_default: sw11_button_pins_default {
		pinctrl-single,pins = <
			J721E_WKUP_IOPAD(0xcc, PIN_INPUT, 7) /* (G28) WKUP_GPIO0_7 */
		>;
	};

	mcu_fss0_ospi1_pins_default: mcu-fss0-ospi1-pins-default {
		pinctrl-single,pins = <
			J721E_WKUP_IOPAD(0x34, PIN_OUTPUT, 0) /* (F22) MCU_OSPI1_CLK */
			J721E_WKUP_IOPAD(0x50, PIN_OUTPUT, 0) /* (C22) MCU_OSPI1_CSn0 */
			J721E_WKUP_IOPAD(0x40, PIN_INPUT, 0) /* (D22) MCU_OSPI1_D0 */
			J721E_WKUP_IOPAD(0x44, PIN_INPUT, 0) /* (G22) MCU_OSPI1_D1 */
			J721E_WKUP_IOPAD(0x48, PIN_INPUT, 0) /* (D23) MCU_OSPI1_D2 */
			J721E_WKUP_IOPAD(0x4c, PIN_INPUT, 0) /* (C23) MCU_OSPI1_D3 */
			J721E_WKUP_IOPAD(0x3c, PIN_INPUT, 0) /* (B23) MCU_OSPI1_DQS */
			J721E_WKUP_IOPAD(0x38, PIN_INPUT, 0) /* (A23) MCU_OSPI1_LBCLKO */
		>;
	};
};

&wkup_pmx0 {
	mcu_cpsw_pins_default: mcu_cpsw_pins_default {
		pinctrl-single,pins = <
			J721E_WKUP_IOPAD(0x0058, PIN_OUTPUT, 0) /* MCU_RGMII1_TX_CTL */
			J721E_WKUP_IOPAD(0x005c, PIN_INPUT, 0) /* MCU_RGMII1_RX_CTL */
			J721E_WKUP_IOPAD(0x0060, PIN_OUTPUT, 0) /* MCU_RGMII1_TD3 */
			J721E_WKUP_IOPAD(0x0064, PIN_OUTPUT, 0) /* MCU_RGMII1_TD2 */
			J721E_WKUP_IOPAD(0x0068, PIN_OUTPUT, 0) /* MCU_RGMII1_TD1 */
			J721E_WKUP_IOPAD(0x006c, PIN_OUTPUT, 0) /* MCU_RGMII1_TD0 */
			J721E_WKUP_IOPAD(0x0078, PIN_INPUT, 0) /* MCU_RGMII1_RD3 */
			J721E_WKUP_IOPAD(0x007c, PIN_INPUT, 0) /* MCU_RGMII1_RD2 */
			J721E_WKUP_IOPAD(0x0080, PIN_INPUT, 0) /* MCU_RGMII1_RD1 */
			J721E_WKUP_IOPAD(0x0084, PIN_INPUT, 0) /* MCU_RGMII1_RD0 */
			J721E_WKUP_IOPAD(0x0070, PIN_INPUT, 0) /* MCU_RGMII1_TXC */
			J721E_WKUP_IOPAD(0x0074, PIN_INPUT, 0) /* MCU_RGMII1_RXC */
		>;
	};

	mcu_mdio_pins_default: mcu_mdio1_pins_default {
		pinctrl-single,pins = <
			J721E_WKUP_IOPAD(0x008c, PIN_OUTPUT, 0) /* MCU_MDIO0_MDC */
			J721E_WKUP_IOPAD(0x0088, PIN_INPUT, 0) /* MCU_MDIO0_MDIO */
		>;
	};

	mcu_mcan0_pins_default: mcu-mcan0-pins-default {
		pinctrl-single,pins = <
			J721E_WKUP_IOPAD(0xac, PIN_INPUT, 0) /* (C29) MCU_MCAN0_RX */
			J721E_WKUP_IOPAD(0xa8, PIN_OUTPUT, 0) /* (D29) MCU_MCAN0_TX */
		>;
	};

	mcu_mcan0_gpio_pins_default: mcu-mcan0-gpio-pins-default {
		pinctrl-single,pins = <
			J721E_WKUP_IOPAD(0xb0, PIN_INPUT, 7) /* (F26) WKUP_GPIO0_0 */
			J721E_WKUP_IOPAD(0x98, PIN_INPUT, 7) /* (E28) MCU_SPI0_D1.WKUP_GPIO0_54 */
		>;
	};

	mcu_mcan1_pins_default: mcu-mcan1-pins-default {
		pinctrl-single,pins = <
			J721E_WKUP_IOPAD(0xc4, PIN_INPUT, 0) /* (G24) WKUP_GPIO0_5.MCU_MCAN1_RX */
			J721E_WKUP_IOPAD(0xc0, PIN_OUTPUT, 0) /* (G25) WKUP_GPIO0_4.MCU_MCAN1_TX */
		>;
	};

	mcu_mcan1_gpio_pins_default: mcu-mcan1-gpio-pins-default {
		pinctrl-single,pins = <
			J721E_WKUP_IOPAD(0xb8, PIN_INPUT, 7) /* (F28) WKUP_GPIO0_2 */
		>;
	};
};

&wkup_uart0 {
	/* Wakeup UART is used by System firmware */
	status = "disabled";
};

&main_uart0 {
	power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;
};

&main_uart3 {
	/* UART not brought out */
	status = "disabled";
};

&main_uart5 {
	/* UART not brought out */
	status = "disabled";
};

&main_uart6 {
	/* UART not brought out */
	status = "disabled";
};

&main_uart7 {
	/* UART not brought out */
	status = "disabled";
};

&main_uart8 {
	/* UART not brought out */
	status = "disabled";
};

&main_uart9 {
	/* UART not brought out */
	status = "disabled";
};

&main_gpio2 {
	status = "disabled";
};

&main_gpio3 {
	status = "disabled";
};

&main_gpio4 {
	status = "disabled";
};

&main_gpio5 {
	status = "disabled";
};

&main_gpio6 {
	status = "disabled";
};

&main_gpio7 {
	status = "disabled";
};

&wkup_gpio1 {
	status = "disabled";
};

&mailbox0_cluster0 {
	interrupts = <436>;

	mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
		ti,mbox-rx = <0 0 0>;
		ti,mbox-tx = <1 0 0>;
	};

	mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
		ti,mbox-rx = <2 0 0>;
		ti,mbox-tx = <3 0 0>;
	};
};

&mailbox0_cluster1 {
	interrupts = <432>;

	mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
		ti,mbox-rx = <0 0 0>;
		ti,mbox-tx = <1 0 0>;
	};

	mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
		ti,mbox-rx = <2 0 0>;
		ti,mbox-tx = <3 0 0>;
	};
};

&mailbox0_cluster2 {
	interrupts = <428>;

	mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
		ti,mbox-rx = <0 0 0>;
		ti,mbox-tx = <1 0 0>;
	};

	mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {
		ti,mbox-rx = <2 0 0>;
		ti,mbox-tx = <3 0 0>;
	};
};

&mailbox0_cluster3 {
	interrupts = <424>;

	mbox_c66_0: mbox-c66-0 {
		ti,mbox-rx = <0 0 0>;
		ti,mbox-tx = <1 0 0>;
	};

	mbox_c66_1: mbox-c66-1 {
		ti,mbox-rx = <2 0 0>;
		ti,mbox-tx = <3 0 0>;
	};
};

&mailbox0_cluster4 {
	interrupts = <420>;

	mbox_c71_0: mbox-c71-0 {
		ti,mbox-rx = <0 0 0>;
		ti,mbox-tx = <1 0 0>;
	};
};

&mailbox0_cluster5 {
	status = "disabled";
};

&mailbox0_cluster6 {
	status = "disabled";
};

&mailbox0_cluster7 {
	status = "disabled";
};

&mailbox0_cluster8 {
	status = "disabled";
};

&mailbox0_cluster9 {
	status = "disabled";
};

&mailbox0_cluster10 {
	status = "disabled";
};

&mailbox0_cluster11 {
	status = "disabled";
};

&mcu_r5fss0_core0 {
	mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
};

&mcu_r5fss0_core1 {
	mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core1>;
};

&main_r5fss0_core0 {
	mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core0>;
};

&main_r5fss0_core1 {
	mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core1>;
};

&main_r5fss1_core0 {
	mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core0>;
};

&main_r5fss1_core1 {
	mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core1>;
};

&c66_0 {
	mboxes = <&mailbox0_cluster3 &mbox_c66_0>;
};

&c66_1 {
	mboxes = <&mailbox0_cluster3 &mbox_c66_1>;
};

&c71_0 {
	mboxes = <&mailbox0_cluster4 &mbox_c71_0>;
};

&ospi1 {
	pinctrl-names = "default";
	pinctrl-0 = <&mcu_fss0_ospi1_pins_default>;

	flash@0{
		compatible = "jedec,spi-nor";
		reg = <0x0>;
		spi-tx-bus-width = <1>;
		spi-rx-bus-width = <4>;
		spi-max-frequency = <40000000>;
		cdns,tshsl-ns = <60>;
		cdns,tsd2d-ns = <60>;
		cdns,tchsh-ns = <60>;
		cdns,tslch-ns = <60>;
		cdns,read-delay = <2>;
		#address-cells = <1>;
		#size-cells = <1>;
	};
};

&tscadc0 {
	adc {
		ti,adc-channels = <0 1 2 3 4 5 6 7>;
	};
};

&tscadc1 {
	adc {
		ti,adc-channels = <0 1 2 3 4 5 6 7>;
	};
};

&dss {
	status = "ok";
};

&dss_ports {
	#address-cells = <1>;
	#size-cells = <0>;

	port@0 {
		reg = <0>;

		dpi_out_real0: endpoint {
			remote-endpoint = <&dp_bridge_input>;
		};
	};
};

&mhdp {
	status = "ok";
	pinctrl-names = "default";
	pinctrl-0 = <&dp0_pins_default>;
};

&dp0_ports {
	#address-cells = <1>;
	#size-cells = <0>;

	port@0 {
		reg = <0>;
		dp_bridge_input: endpoint {
			remote-endpoint = <&dpi_out_real0>;
		};
	};

	port@1 {
		reg = <1>;
		dp_bridge_output: endpoint {
			remote-endpoint = <&dp_connector_in>;
		};
	};
};

&main_i2c0 {
	pinctrl-names = "default";
	pinctrl-0 = <&main_i2c0_pins_default>;
	clock-frequency = <400000>;

	exp1: gpio@20 {
		compatible = "ti,tca6416";
		reg = <0x20>;
		gpio-controller;
		#gpio-cells = <2>;
	};

	exp2: gpio@22 {
		compatible = "ti,tca6424";
		reg = <0x22>;
		gpio-controller;
		#gpio-cells = <2>;

		p08 {
			/* P10 - PM_I2C_CTRL_OE */
			gpio-hog;
			gpios = <8 GPIO_ACTIVE_HIGH>;
			output-high;
			line-name = "CTRL_PM_I2C_OE";
		};

		p09 {
			/* P11 - MCASP/TRACE_MUX_S0 */
			gpio-hog;
			gpios = <9 GPIO_ACTIVE_HIGH>;
			output-low;
			line-name = "MCASP/TRACE_MUX_S0";
		};

		p10 {
			/* P12 - MCASP/TRACE_MUX_S1 */
			gpio-hog;
			gpios = <10 GPIO_ACTIVE_HIGH>;
			output-high;
			line-name = "MCASP/TRACE_MUX_S1";
		};
	};
};

&main_i2c2 {
	pinctrl-names = "default";
	pinctrl-0 = <&main_i2c2_pins_default>;
	clock-frequency = <400000>;

	ina226@40 {
		compatible = "ti,ina226";
		reg = <0x40>;
		shunt-resistor = <10000>;
	};

	ina226@41 {
		compatible = "ti,ina226";
		reg = <0x41>;
		shunt-resistor = <10000>;
	};

	ina226@42 {
		compatible = "ti,ina226";
		reg = <0x42>;
		shunt-resistor = <10000>;
	};

	ina226@43 {
		compatible = "ti,ina226";
		reg = <0x43>;
		shunt-resistor = <10000>;
	};

	ina226@44 {
		compatible = "ti,ina226";
		reg = <0x44>;
		shunt-resistor = <10000>;
	};

	ina226@45 {
		compatible = "ti,ina226";
		reg = <0x45>;
		shunt-resistor = <5000>;
	};

	ina226@46 {
		compatible = "ti,ina226";
		reg = <0x46>;
		shunt-resistor = <10000>;
	};

	ina226@47 {
		compatible = "ti,ina226";
		reg = <0x47>;
		shunt-resistor = <10000>;
	};

	ina226@48 {
		compatible = "ti,ina226";
		reg = <0x48>;
		shunt-resistor = <10000>;
	};

	ina226@49 {
		compatible = "ti,ina226";
		reg = <0x49>;
		shunt-resistor = <10000>;
	};

	ina226@4a {
		compatible = "ti,ina226";
		reg = <0x4a>;
		shunt-resistor = <10000>;
	};

	ina226@4b {
		compatible = "ti,ina226";
		reg = <0x4b>;
		shunt-resistor = <10000>;
	};

	ina226@4c {
		compatible = "ti,ina226";
		reg = <0x4c>;
		shunt-resistor = <10000>;
	};

	ina226@4d {
		compatible = "ti,ina226";
		reg = <0x4d>;
		shunt-resistor = <10000>;
	};

	ina226@4e {
		compatible = "ti,ina226";
		reg = <0x4e>;
		shunt-resistor = <10000>;
	};

	ina226@4f {
		compatible = "ti,ina226";
		reg = <0x4f>;
		shunt-resistor = <10000>;
	};
};

&main_i2c1 {
	pinctrl-names = "default";
	pinctrl-0 = <&main_i2c1_pins_default>;
	clock-frequency = <400000>;

	exp4: gpio@20 {
		compatible = "ti,tca6408";
		reg = <0x20>;
		gpio-controller;
		#gpio-cells = <2>;
		pinctrl-names = "default";
		pinctrl-0 = <&main_i2c1_exp4_pins_default>;
		interrupt-parent = <&main_gpio1>;
		interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
		interrupt-controller;
		#interrupt-cells = <2>;

		p0 {
			/* P0 - DP0_PWR_SW_EN */
			gpio-hog;
			gpios = <0 GPIO_ACTIVE_HIGH>;
			output-high;
			line-name = "DP0_PWR_SW_EN";
		};
	};
};

&k3_clks {
	/* Confiure AUDIO_EXT_REFCLK2 pin as output */
	pinctrl-names = "default";
	pinctrl-0 = <&audi_ext_refclk2_pins_default>;
};

&main_i2c3 {
	pinctrl-names = "default";
	pinctrl-0 = <&main_i2c3_pins_default>;
	clock-frequency = <400000>;

	exp3: gpio@20 {
		compatible = "ti,tca6408";
		reg = <0x20>;
		gpio-controller;
		#gpio-cells = <2>;
	};

	pcm3168a_1: audio-codec@44 {
		compatible = "ti,pcm3168a";
		reg = <0x44>;

		#sound-dai-cells = <1>;

		reset-gpios = <&exp3 0 GPIO_ACTIVE_LOW>;

		/* C_AUDIO_REFCLK2 -> RGMII6_RXC (W26) */
		clocks = <&k3_clks 157 371>;
		clock-names = "scki";

		/* HSDIV3_16FFT_MAIN_4_HSDIVOUT2_CLK -> REFCLK2 */
		assigned-clocks = <&k3_clks 157 371>;
		assigned-clock-parents = <&k3_clks 157 400>;
		assigned-clock-rates = <24576000>; /* for 48KHz */

		VDD1-supply = <&vsys_3v3>;
		VDD2-supply = <&vsys_3v3>;
		VCCAD1-supply = <&vsys_5v0>;
		VCCAD2-supply = <&vsys_5v0>;
		VCCDA1-supply = <&vsys_5v0>;
		VCCDA2-supply = <&vsys_5v0>;
	};
};

&main_i2c6 {
	pinctrl-names = "default";
	pinctrl-0 = <&main_i2c6_pins_default>;
	clock-frequency = <400000>;

	exp5: gpio@20 {
		compatible = "ti,tca6408";
		reg = <0x20>;
		gpio-controller;
		#gpio-cells = <2>;
	};

	ov5640: camera@3c {
		compatible = "ovti,ov5640";
		reg = <0x3c>;

		clocks = <&clk_ov5640_fixed>;
		clock-names = "xclk";
		reset-gpios = <&exp5 0 GPIO_ACTIVE_LOW>;

		port {
			csi2_cam0: endpoint {
				remote-endpoint = <&csi2rx0_in_sensor>;
				clock-lanes = <0>;
				data-lanes = <1 2>;
			};
		};
	};
};

&mcasp10 {
	#sound-dai-cells = <0>;

	pinctrl-names = "default";
	pinctrl-0 = <&mcasp10_pins_default>;

	op-mode = <0>;          /* MCASP_IIS_MODE */
	tdm-slots = <2>;
	auxclk-fs-ratio = <256>;

	serial-dir = <	/* 0: INACTIVE, 1: TX, 2: RX */
		1 1 1 1
		2 2 2 0
	>;
	tx-num-evt = <0>;
	rx-num-evt = <0>;

	status = "okay";
};

&mcu_cpsw {
	pinctrl-names = "default";
	pinctrl-0 = <&mcu_cpsw_pins_default &mcu_mdio_pins_default>;
};

&davinci_mdio {
	phy0: ethernet-phy@0 {
		reg = <0>;
		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
	};
};

&cpsw_port1 {
	phy-mode = "rgmii-rxid";
	phy-handle = <&phy0>;
};

&main_sdhci0 {
	/* eMMC */
	non-removable;
	ti,driver-strength-ohm = <50>;
	disable-wp;
};

&main_sdhci1 {
	/* SD/MMC */
	vmmc-supply = <&vdd_mmc1>;
	vqmmc-supply = <&vdd_sd_dv_alt>;
	pinctrl-names = "default";
	pinctrl-0 = <&main_mmc1_pins_default>;
	disable-wp;
};

&main_sdhci2 {
	/* Unused */
	status = "disabled";
};

&serdes0 {
	serdes0_pcie_link: link@0 {
		reg = <0>;
		cdns,num-lanes = <1>;
		#phy-cells = <0>;
		cdns,phy-type = <PHY_TYPE_PCIE>;
		resets = <&serdes_wiz0 1>;
	};
};

&serdes1 {
	serdes1_pcie_link: link@0 {
		reg = <0>;
		cdns,num-lanes = <2>;
		#phy-cells = <0>;
		cdns,phy-type = <PHY_TYPE_PCIE>;
		resets = <&serdes_wiz1 1>, <&serdes_wiz1 2>;
	};
};

&serdes2 {
	serdes2_pcie_link: link@0 {
		reg = <0>;
		cdns,num-lanes = <2>;
		#phy-cells = <0>;
		cdns,phy-type = <PHY_TYPE_PCIE>;
		resets = <&serdes_wiz2 1>, <&serdes_wiz2 2>;
	};
};

&pcie0_rc {
	reset-gpios = <&exp1 6 GPIO_ACTIVE_HIGH>;
	phys = <&serdes0_pcie_link>;
	phy-names = "pcie_phy";
	num-lanes = <1>;
};

&pcie1_rc {
	reset-gpios = <&exp1 2 GPIO_ACTIVE_HIGH>;
	phys = <&serdes1_pcie_link>;
	phy-names = "pcie_phy";
	num-lanes = <2>;
};

&pcie2_rc {
	reset-gpios = <&exp2 20 GPIO_ACTIVE_HIGH>;
	phys = <&serdes2_pcie_link>;
	phy-names = "pcie_phy";
	num-lanes = <2>;
};

&pcie0_ep {
	phys = <&serdes0_pcie_link>;
	phy-names = "pcie_phy";
	num-lanes = <1>;
	status = "disabled";
};

&pcie1_ep {
	phys = <&serdes1_pcie_link>;
	phy-names = "pcie_phy";
	num-lanes = <2>;
	status = "disabled";
};

&pcie2_ep {
	phys = <&serdes2_pcie_link>;
	phy-names = "pcie_phy";
	num-lanes = <2>;
	status = "disabled";
};

&pcie3_rc {
	status = "disabled";
};

&pcie3_ep {
	status = "disabled";
};

&usb_serdes_mux {
	idle-states = <1>, <0>; /* USB0 to SERDES3, USB1 to SERDES1 */
};

&serdes_ln_ctrl {
	idle-states = <SERDES0_LANE0_PCIE0_LANE0>, <SERDES0_LANE1_PCIE0_LANE1>,
		      <SERDES1_LANE0_PCIE1_LANE0>, <SERDES1_LANE1_PCIE1_LANE1>,
		      <SERDES2_LANE0_PCIE2_LANE0>, <SERDES2_LANE1_PCIE2_LANE1>,
		      <SERDES3_LANE0_USB3_0_SWAP>, <SERDES3_LANE1_USB3_0>,
		      <SERDES4_LANE0_EDP_LANE0>, <SERDES4_LANE1_EDP_LANE1>, <SERDES4_LANE2_EDP_LANE2>, <SERDES4_LANE3_EDP_LANE3>;
};

&serdes_wiz3 {
	typec-dir-gpios = <&main_gpio1 3 GPIO_ACTIVE_HIGH>;
	typec-dir-debounce-ms = <700>;	/* TUSB321, tCCB_DEFAULT 133 ms */
};

&serdes3 {
	serdes3_usb_link: link@0 {
		reg = <0>;
		cdns,num-lanes = <2>;
		#phy-cells = <0>;
		cdns,phy-type = <PHY_TYPE_USB3>;
		resets = <&serdes_wiz3 1>, <&serdes_wiz3 2>;
	};
};

&usbss0 {
	pinctrl-names = "default";
	pinctrl-0 = <&main_usbss0_pins_default>;
	ti,vbus-divider;
};

&usb0 {
	dr_mode = "otg";
	maximum-speed = "super-speed";
	phys = <&serdes3_usb_link>;
	phy-names = "cdns3,usb3-phy";
};

&usbss1 {
	pinctrl-names = "default";
	pinctrl-0 = <&main_usbss1_pins_default>;
	ti,usb2-only;
};

&usb1 {
	dr_mode = "host";
	maximum-speed = "high-speed";
};

/* uart2 assigned to cpsw9g eth-switch fw running on remote CPU core */
&main_uart2 {
	status = "disabled";
};

&mcu_mcan0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&mcu_mcan0_pins_default &mcu_mcan0_gpio_pins_default>;
	stb-gpios = <&wkup_gpio0 54 GPIO_ACTIVE_HIGH>;
	en-gpios = <&wkup_gpio0 0 GPIO_ACTIVE_HIGH>;
	can-transceiver {
		max-bitrate = <5000000>;
	};
};

&mcu_mcan1 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&mcu_mcan1_pins_default &mcu_mcan1_gpio_pins_default>;
	stb-gpios = <&wkup_gpio0 2 GPIO_ACTIVE_LOW>;
	can-transceiver {
		max-bitrate = <5000000>;
	};
};

&main_mcan0 {
	status = "disabled";
};

&main_mcan1 {
	status = "disabled";
};

&main_mcan2 {
	status = "disabled";
};

&main_mcan3 {
	status = "disabled";
};

&main_mcan4 {
	status = "disabled";
};

&main_mcan5 {
	status = "disabled";
};

&main_mcan6 {
	status = "disabled";
};

&main_mcan7 {
	status = "disabled";
};

&main_mcan8 {
	status = "disabled";
};

&main_mcan9 {
	status = "disabled";
};

&main_mcan10 {
	status = "disabled";
};

&main_mcan11 {
	status = "disabled";
};

&main_mcan12 {
	status = "disabled";
};

&main_mcan13 {
	status = "disabled";
};

&csi2_0 {
	csi2rx0_in_sensor: endpoint {
		remote-endpoint = <&csi2_cam0>;
		bus-type = <4>; /* CSI2 DPHY. */
		clock-lanes = <0>;
		data-lanes = <1 2>;
	};
};

thanks very much for your reply kindly.

Regards,

Yan

0 yan yan over 4 years ago in reply to Karan Saxena

Prodigy 215 points

Hi Karan,

could send me your Device Tree to me, thanks.

Regards,

Yan

0 Karan Saxena over 4 years ago in reply to yan yan

TI__Guru* 77774 points

Hi Yan Yan,

I just have the below patch on the SDK device tree:

diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
index cd3156995..b02221b33 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
@@ -14,7 +14,7 @@
 / {
        chosen {
                stdout-path = "serial2:115200n8";
-               bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000";
+               bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000 root=/dev/mmcblk1p2 rw rootfstype=ext4 rootwait";
        };

        gpio_keys: gpio-keys {

Regards,

Karan

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