AM5728: RTOS diagnostics mem test error (4 GB RAM)

/* **************************	

		DARSH


************************************* */


/*
 * Copyright (c) 2015-2020, Texas Instruments Incorporated
 * All rights reserved.
 *
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 *    notice, this list of conditions and the following disclaimer.
 *
 * *  Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
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 *    from this software without specific prior written permission.
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 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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/**
 *  \file   mem_test.c
 *
 *  \brief  DDR diagnostic test main file
 *
 *  This file implements the DDR memory test function to verify the DDR
 *  memory access by writing a test pattern to all the locations and reading
 *  the same for verification.
 *
 */

#include <ti/drv/uart/UART_stdio.h>
#include <stdlib.h>
#include <stdbool.h>
#include "board.h"
#include "board_cfg.h"
#if (defined(SOC_AM65XX) || defined(SOC_J721E))
#include "diag_common_cfg.h"
#endif

#define BIT_COUNT		(32)
#define ONE			    (0x00000001)
#define MSG_FREQ        (0xFFFFFFc)

#define BOARD_DDR1_START_ADDR (BOARD_DDR31_START_ADDR)
#define BOARD_DDR1_END_ADDR   (BOARD_DDR31_END_ADDR)
#define BOARD_DDR1_SIZE       (BOARD_DDR31_SIZE)
#define BOARD_DDR2_START_ADDR (BOARD_DDR32_START_ADDR)
#define BOARD_DDR2_END_ADDR   (BOARD_DDR32_END_ADDR)
#define BOARD_DDR2_SIZE       (BOARD_DDR32_SIZE)

#define BOARD_DIAG_MEM_LWORD_SPLIT(lw) ((lw >> 32) & 0xFFFFFFFF), (lw & 0xFFFFFFFF)

char rdBuf = 'y';

/**
 * \brief  Memory test for extended access beyond 2GB
 *
 * This function verifies the DDR memory  access by writing a data
 * and its compliment to all the locations and reading the same for
 * verification.
 *
 * \param   start_address  [IN]   Starting address of the DDR memory
 * \param   end_address    [IN]   Ending address of the DDR memory
 *
 * \return  int32_t
 *              0  - In case of success
 *             -1  - In case of failure
 *
 */
static inline int32_t board_memory_test64 (uint64_t start_address, uint64_t end_address)
{
    uint64_t index;
    uint64_t value = 0;
    uint64_t lsb = 0;
    uint64_t msb = 4;

    UART_printf("First test started\n");
    UART_printf("Writing to test area...\n");

    /* Write a pattern */
    for (index = start_address; (index >= start_address) && (index < end_address); index += 8)
    {
        value = ((msb << 32) | lsb);

        *(uint64_t *)index = value;

        if (!(index & (uint32_t)MSG_FREQ))
        {
            UART_printf("\tWrite up to 0x%x%08x done\n", BOARD_DIAG_MEM_LWORD_SPLIT(index));
        }

        msb += 8;
        lsb += 8;
    }

    UART_printf("Write finished!\n");
    UART_printf("Checking values...\n");

    /* Read and check the pattern */
    msb     = 4;
    lsb     = 0;
    for (index = start_address;  (index >= start_address) && (index < end_address); index += 8)
    {
        value = *(uint64_t *)index;

        if((value != ((msb << 32) | lsb)))
        {
            UART_printf("board_memory_test64: Failed at address index = 0x%x%08x value = 0x%x%08x\n",
                        BOARD_DIAG_MEM_LWORD_SPLIT(index),
                        BOARD_DIAG_MEM_LWORD_SPLIT(value));
            return (-1);
        }

        if (!(index & MSG_FREQ))
        {
            UART_printf("\tRead up to 0x%x%08x done\n", BOARD_DIAG_MEM_LWORD_SPLIT(index));
        }

        msb += 8;
        lsb += 8;
    }

    UART_printf("\nSecond test started\n");
    UART_printf("Writing complementary values to test area...\n");
    msb     = 4;
    lsb     = 0;
    /* Write a pattern for complementary values */
    for (index = start_address; (index >= start_address) && (index < end_address); index += 8)
    {
        value = ((msb << 32) | lsb);

        *(uint64_t *)index = ~value;

        if (!(index & MSG_FREQ))
        {
            UART_printf("\tWrite up to 0x%x%08x done\n", BOARD_DIAG_MEM_LWORD_SPLIT(index));
        }

        msb += 8;
        lsb += 8;
    }

    UART_printf("Write finished!\n");
    UART_printf("Checking values...\n");
    /* Read and check the pattern */
    msb     = 4;
    lsb     = 0;
    for (index = start_address;  (index >= start_address) && (index < end_address); index += 8)
    {
        value = *(uint64_t *)index;

        if((~value != ((msb << 32) | lsb)))
        {
            UART_printf("board_memory_test64: Failed at address index = 0x%x%08x value = 0x%x%08x\n",
                        BOARD_DIAG_MEM_LWORD_SPLIT(index),
                        BOARD_DIAG_MEM_LWORD_SPLIT(value));
            return (-1);
        }

        if (!(index & MSG_FREQ))
        {
            UART_printf("\tRead up to 0x%x%08x done\n", BOARD_DIAG_MEM_LWORD_SPLIT(index));
        }

        msb += 8;
        lsb += 8;
    }

    return 0;
}
/**
 * \brief  walking0s test function
 *
 * This function verifies the DDR memory  access by writing a address
 * and its compliment to all the locations and reading the same for
 * verification.
 *
 * \param   start_address  [IN]   Starting address of the DDR memory
 * \param   end_address    [IN]   Ending address of the DDR memory
 *
 * \return  int32_t
 *              0  - In case of success
 *             -1  - In case of failure
 *
 */
static inline int32_t board_memory_test32 (uint32_t start_address,
                                                uint32_t end_address)
{
	uint32_t index, value;

	UART_printf("First test started\n");
	UART_printf("Writing to test area...\n");
	/* Write a pattern */
	for (index = start_address; (index >= start_address) &&
                        (index < end_address); index += 4) {
        HW_WR_REG32(index, (uint32_t)index);
		if (!(index & MSG_FREQ))
            UART_printf("\tWrite up to 0x%08x done\n", index);
	}

	UART_printf("Write finished!\n");
	UART_printf("Checking values...\n");

	/* Read and check the pattern */
	for (index = start_address;  (index >= start_address) &&
                            (index < end_address); index += 4) {

        value = HW_RD_REG32(index);

		if (value  != index) {
			UART_printf("board_memory_test32: Failed at address index = 0x%x \
                                            value = 0x%x *(index) = 0x%x\n",
                                index, value, HW_RD_REG32(index));
			return (-1);
		}
		if (!(index & MSG_FREQ))
            UART_printf("\tRead up to 0x%08x okay\n", index);
	}

	UART_printf("Second test started\n");
	UART_printf("Writing complementary values to test area...\n");
	/* Write a pattern for complementary values */
	for (index = start_address; (index >= start_address) &&
                        (index < end_address); index += 4) {
        HW_WR_REG32(index, (uint32_t)~index);
		if (!(index & MSG_FREQ))
            UART_printf("\tWrite up to 0x%08x done\n", index);
	}

	UART_printf("Write finished!\n");
	UART_printf("Checking values...\n");
	/* Read and check the pattern */
	for (index = start_address;  (index >= start_address) &&
                        (index < end_address); index += 4) {

		value = HW_RD_REG32(index);

		if (value  != ~index) {
			UART_printf("board_memory_test32: Failed at address index = 0x%x \
                            value = 0x%x *(index) = 0x%x\n", \
                            index, value, HW_RD_REG32(index));
			return (-1);
		}
		if (!(index & MSG_FREQ))
            UART_printf("\tRead up to 0x%08x okay\n", index);
	}

	return 0;
}

int32_t board_external_memory_test(void)
{

    int32_t status;
    int ret;
   

//First 2GB
	
    UART_printf("\n TESTING FIRST 2 GB - 32BIT ADDRESSES \n");

    UART_printf("board_external_memory_test: Start address1 (0x%010x), \
           end address (0x%010x)\n",BOARD_DDR1_START_ADDR, BOARD_DDR1_END_ADDR);
    UART_printf("\tTEST PRINT 594\n");
        status = board_memory_test32(BOARD_DDR1_START_ADDR, BOARD_DDR1_END_ADDR);

 	if (status < 0)
        {
                UART_printf("Board memory test failed!\n");
                ret = -1;
        }
        else
        {
                UART_printf("Board memory test passed!\n");
                ret = 0;
        }


//Second 2GB
 
    UART_printf("\n TESTING SECOND 2 GB - 64BIT ADDRESSES \n");

    /* Printf complication due to UART_printf not supporting 64-bit */
    UART_printf("\n Printf complication due to UART_printf not supporting 64-bit \n");
    UART_printf("board_external_memory_test: Start address (0x%x%08x), \
           end address (0x%x%08x)\n",
           BOARD_DIAG_MEM_LWORD_SPLIT(BOARD_DDR2_START_ADDR),
           BOARD_DIAG_MEM_LWORD_SPLIT(BOARD_DDR2_END_ADDR));
	status = board_memory_test64(BOARD_DDR2_START_ADDR, BOARD_DDR2_END_ADDR);
	
	if (status < 0)
	{
		UART_printf("Board memory test failed!\n");
		ret = -1;
	}
	else
	{
		UART_printf("Board memory test passed!\n");
		ret = 0;
	}

    return ret;
}

int mem_test()
{
	int32_t status;
	int ret;

#ifdef DIAG_STRESS_TEST
	UART_printf("\n****************************************************\n");
	UART_printf  ("*            DDR Memory Stress Test                *\n");
	UART_printf  ("****************************************************\n");
#else
	UART_printf("\n*********************************************\n");
	UART_printf  ("*              DDR Memory Test (2GB + Extended 2GB)              *\n");
	UART_printf  ("*********************************************\n");
#endif

	UART_printf("\nTesting writing and reading memory\n");
	status = board_external_memory_test();
	if (status < 0)
	{
		UART_printf("Memory test failed!\n");
		ret = -1;
	}
	else
	{
		UART_printf("Memory test passed!\n");
		ret = 0;
	}
	return ret;
}

/*
 *  ======== main ========
 */
#ifndef SPI_BOOT_FRAMEWORK
int main(void)
{
    Board_initCfg boardCfg;
    
#ifdef SOC_K2G
    DIAG_IntrInit();
#endif

#ifdef PDK_RAW_BOOT
    boardCfg = BOARD_INIT_MODULE_CLOCK |
               BOARD_INIT_PINMUX_CONFIG |
               BOARD_INIT_UART_STDIO;
#else
    boardCfg = BOARD_INIT_UART_STDIO |
               BOARD_INIT_PINMUX_CONFIG;
#endif  /*  #ifdef PDK_RAW_BOOT */
    Board_init(boardCfg);
    
    return mem_test();
}
#endif