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AM3352: PORONRST delay after power supply stable?

Tony Tang
Mastermind 28922 points
Part Number: AM3352

Is there delay requirement between power supply and PORONRST?

Or CLK_M_OSC stable time before PWRONRST release? 

I think should have, but I did not find it.

  • 0
    TI__Guru* 85990 points

    The parameters you mention are not specified, however, there is a parameter tsx specified in the oscillator crystal characteristics which mentions a typical startup time for the oscillator of 1.5ms.  Since the PWRONRST signal should rise only after power supplies are stable AND oscillator is stable, the PWRONRST signal must be low for at least this time after VDD_CORE is stable, and I would recommend to make it much longer (eg, 50ms) to cover all cases if you don't need to optimize it.

    If you are looking to optimize this time, it is your responsibility to characterize the crystal circuit in your design to ensure the PWRONRST signal meets the requirements above.       

    Regards,

    James