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Doubt regarding OMAPL138 LOGIC PD SOM Rev A PMIC interrupt connection

Other Parts Discussed in Thread: OMAPL138

Hi All,

 

We are using Logic PD based OMAPL138 SOM (Rev A) and Base board(Rev A). On this set up we are using WinCE 6.0 BSP (V 1.00.02) provided by MPC.

 

In the schematic of the SOM it shows that PMIC interrupt is connected to NMI of the processor but in the code of touch screen driver we are allocating GPIO2[3] for getting PMIC interrupt. When we downloaded the image, the touch screen controller whose interrupt is connected to PMIC interrupt is working!

 

I wanted to know whether there is some documentation problem on Rev A schematic or some other logic?

 

Thank you,

   Abhijit

  • Abhijit,

     

    Abhijit Naik said:
    I wanted to know whether there is some documentation problem on Rev A schematic or some other logic?

      Schematics are available to download from LogicPD. There are migration documents that are available on Logic's website that explain the difference between the SOM versions. If you have any questions on the hardware design, you can contact LogicPD's support email.

     

    Abhijit Naik said:
    In the schematic of the SOM it shows that PMIC interrupt is connected to NMI of the processor but in the code of touch screen driver we are allocating GPIO2[3] for getting PMIC interrupt. When we downloaded the image, the touch screen controller whose interrupt is connected to PMIC interrupt is working!

    The non-maskable interrupt (NMI) must be enabled for maskable interrupts to work. Did you physically disconnect the Interrupt from the PMIC to the NMI signal and connect to your GPIO2[3]?

  • Hi Drew,

    Thank you for reply. We didn't changed any part of the code provided by MPC. In the code of MPC, registry path for touch screen shows, GPIO2[3] has been allocated for getting interrupt from PMIC.

    We didn't changed any routing on the SOM. Just out of interest I checked the schematic of Rev A board, which shows PMIC interrupt being connected through NMI. But still the touch screen is working. I will just post the question on the Logic PD site.

    Thank you.

  • Abhijit,

         It sounds like MPC would be more beneficial to talk to about this on. I'm not familiar with the MPC code, so I can't give you any insight in regards to how they restructure their code.

        Also, note that the ISR for the NMI doesn't actually have to do anything, since it can be disabled as per chapter 6 of the C674x DSP Instruction Set Reference Guide, so it's possible that the MPC code could disable the NMIE and enable interrupts through the GPIO bank.