This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

AM6411: Levels on USB0_VBUS input

Part Number: AM6411

Hi,

My customer wants to know (1) the USB0_VBUS input pin detect HI_min and LOW_max thresholds, as well as (2) how over-voltage clamping occurs on that pin;
It is said that the buffer is powered by three domains (0.85V/1.8V/3.3V) and probably only one is attached to the 'substrate clamp diode'?
Also (3), what would the allowed max clamp current be, non-destructive, via the substrate, either with or without power to the CPU?

Thanks.

B.r M.A.M

  • We do not define VBUS thresholds. VBUS thresholds are defined in the USB specification. The thresholds were designed to be compliant to the USB specifications and validated via USB-IF compliance tests. 

    The VBUS input has an ESD clamp to the 3.3V rail. The USB VBUS Design Guidelines section of the AM64x datasheet defines the VBUS connection topology. This voltage divider / clamp circuit allows VBUS to go up to 30V without harming the VBUS input. The Zener diode could be removed and a 20 kohm resistor could be substituted for the 16.5 kohm and 3.5 kohm resistors if your system will never apply a VBUS potential greater than 5.5V.

    Regards,
    Paul