If you are interested in learning more about the new AM6442 Sitara Processor family and how it enables Time Sensitive Networking (TSN) on Linux, please join us for this webinar. This is the fourth webinar in our monthly webinar series. There are two sessions for your convenience: One at 10AM CST for the Western Hemisphere on 6/24/2021 and another at 9PM CST (10 AM GMT + 8) for the Eastern Hemisphere 6/24/2021 (6/25/2021 in Asia). There are registration links for both sessions below.
In this webinar we’ll focus on the AM64x Time Sensitive Networking (TSN) capabilities that enable a deterministic networking across a line topology of several nodes. The built in cut-through switching with IEEE802.1Q-2018 TSN capabilities will be setup using standard Linux interfaces and offloaded to AM64x Ethernet interfaces and built-in switch. Key features enabled are generic Precision Time Protocol (gPTP) 802.1AS-2011, preemption (IET/Qbu), and time aware shaper (EST/Qbv).
If you'd like to learn more about this system, we will dive deeper into the software and how the system is enabled by the AM64x architecture. Here are some things you will learn:
- The TSN capabilities of the on-chip hardware switch including low-latency cut-through switching
- How to use the capabilities using standard Linux software interfaces
- The different TI platforms that enable these capabilities
Click on your desired time slot below to register now for the event.
Session 1 - 10AM CST 6/24/2021 - Western Hemisphere
Session 2 - 9PM CST 6/24/2021 (10AM GMT+8 5/28/2021) - Eastern Hemisphere
We plan to run this webinar series on a Tuesday and Thursday (Friday for Asia) throughout the year. Please make sure to subscribe to this post to get updates on future topics.
If you can't attend, a video link and the presentation material will be provided here shortly after the event. Subscribe to the post to get updates.
TI Sitara Linux TSN webinar.pdf
Also, please feel free to submit requests by replying below. We will consider all requests for topics that apply to TI Processors from Jacinto and Sitara.
