DRA829V: Maximum supported UART speed

Arun M1

Part Number: DRA829V

Team,

Could you please let me know whether the UART can be configured for a speed of 12Mbps. We are having a requirement of 8 UARTs with 12Mbps individual speed.

Thanks,

Arun

over 4 years ago

0 Karan Saxena over 4 years ago

TI__Guru* 78035 points

Hi Arun,

Are you asking about the UART baud rate?

The Section 12.1.6.1.1 UART Features of the TRM mentions "The 48 MHz functional clock is default option and allows baud rates up to 3.6 Mbps".

Regards,

Karan

0 Arun M1 over 4 years ago in reply to Karan Saxena

Intellectual 665 points

Hi Karan,

Yes. Can we modify the default clock to configure it to higher baud rate ?

Rgds,

Arun

0 Karan Saxena over 4 years ago in reply to Arun M1

TI__Guru* 78035 points

Hi Arun, I have asked the HW team to comment on this.

Regards,

Karan

0 Arun M1 over 4 years ago in reply to Karan Saxena

Intellectual 665 points

Hi Karan,

Sure; I can see in the datasheet the maximum programmable baud rate is 12 under 15pF mode.

Thanks and Regards,

Arun M

0 Shiou Mei Huang over 4 years ago in reply to Arun M1

TI__Genius 10180 points

Arun,

You need to modify the CLK to 192 MHz by updating the CTRLMMR_USART0_CLK_CTRL register. Note corresponding LOCK register needs to be unlocked; for USART0, it is CTRLMMR_LOCK2.

Best Regards,

Shiou Mei

0 Divyanshu kumar over 4 years ago in reply to Shiou Mei Huang

Intellectual 280 points

Hi shlou,

To configure the clock for 192 MHz we need to configure the CLK_DIV of CTRLMMR_USART0_CLK_CTRL register as 0. is my understanding is correct.

To achieve 12 Mbs Baud rate how to calculate the UART_DLH and UART_DLL register value.

Is there any other settings also need to change to achieve the 12 Mbps baud rate.

0 Shiou Mei Huang over 4 years ago in reply to Divyanshu kumar

TI__Genius 10180 points

Divysanshu,

Yes, CTRLMMR_USART0_CLK_CTRL should be 0. You will have to make sure Bit16 of the same register is cleared and then set to 1 for the changes to take.

Section 12.1 has a UART Baud Rate Generation figure showing the relationship between input frequency, DLH/ DLL divisor, 16x/13x divisor, and output frequency. Essentially output freq = (input freq / DLH-DLL divisor) / (16x or 13x divisor). With 192 MHz input, you can try 16x with DLH-DLL = 0x1 to achieve 12 Mbps. UART_MDR1 should have Bits 2:0 set to use UART 16x mode.

Best Regards,

Shiou Mei

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DRA829V: Maximum supported UART speed