DRA821U: CPSW2G + TSN demo

Jay Sun

Part Number: DRA821U
Other Parts Discussed in Thread: DRA821

I have tried setting the schedule as described in "example schedule" section of the following web page,

https://software-dl.ti.com/jacinto7/esd/processor-sdk-linux-j7200/07_03_00_04/exports/docs/j7200/linux/Foundational_Components/Kernel/Kernel_Drivers/Network/CPSW2g.html#enhancements-for-scheduled-traffic-est-offload

(1)Before The EST demo, I try to ping EVM(leftside,IP:192.168.2.20) CPSW2g eth port from my NB eth port(rightside: IP: 192.168.2.10) as following, it's OK to ping each other.

(2) Then I try to run the steps to configure this schedule, EVM　linux cmd window shows :unable to connect to server : Connection time out

And in Wireshark log message show TCP Retransmission .

Could you point me to what I have to do to fix this error?

over 4 years ago

0 Vineet Roy over 4 years ago

TI__Mastermind 37435 points

Hi,

I have tried this myself and it works. Can you log your session (commands you are running) and post here ? Sometimes if the sequence (to program schedule) isn't executed correctly or there is some other error then this happens.

Regards

Vineet

0 Jay Sun over 4 years ago in reply to Vineet Roy

Expert 1095 points

Hi Vineet

I have tried again and ti works, but test result in wireshark shows: schedule time (TC0@port 5001:6us /TC1@port5002:32us / TC2@port5003:64us) are not fit taprio setting (250us/125us/125us), also the cycle time in only 168us< (500us),

Could you show you TAS test result? is same as the demo?

Could you point me to what I have to do to fix this issue?

#here is remode PC cmd

iperf3 -s -i30 -p5001&

iperf3 -s -i30 -p5002&
iperf3 -s -i30 -p5003&

#here is J7200 EMV cmd

ip link set dev eth0 down
ethtool -L eth0 tx 3
ethtool --set-priv-flags eth0 p0-rx-ptype-rrobin off
ip link set dev eth0 up
tc qdisc replace dev eth0 parent root handle 100 taprio \
   num_tc 3 \
   map 0 0 1 2 0 0 0 0 0 0 0 0 0 0 0 0 \
   queues 1@0 1@1 1@2 \
   base-time 0000 \
   sched-entry S 4 125000 \
   sched-entry S 2 125000 \
   sched-entry S 1 250000 \
   flags 2
tc qdisc add dev eth0 clsact
tc filter add dev eth0 egress protocol ip prio 1 u32 match ip dport 5003 0xffff action skbedit priority 3
tc filter add dev eth0 egress protocol ip prio 1 u32 match ip dport 5002 0xffff action skbedit priority 2
tc filter add dev eth0 egress protocol ip prio 1 u32 match ip dport 5001 0xffff action skbedit priority 1
ip addr add 192.168.2.20/24 dev eth0
ip link set dev eth0 up
iperf3 -c 192.168.2.10 -u -b100M -p 5003 -l1472 -t10 -i5&
iperf3 -c 192.168.2.10 -u -b100M -p 5002 -l1472 -t10 -i5&
iperf3 -c 192.168.2.10 -u -b100M -p 5001 -l1472 -t10 -i5&

iperf3 test result as following：left side is remode pc, right side if J7200_EVM

JAY

0 Jay Sun over 4 years ago in reply to Jay Sun

Expert 1095 points

Hi TI

We have tried again in others J7200EVM and PC, it is same result as before

TAS Gate control time or cycle time is not same as tc taprio setting

Could you point me to what I have to do to fix this issue?

0 Jay Sun over 4 years ago in reply to Vineet Roy

Expert 1095 points

HI Vineet

Do you have any idea about schedule time is not same as tc taprio setting ?

JAY

0 Jay Sun over 4 years ago in reply to Jay Sun

Expert 1095 points

HI Vineet

We have tried modify duration of Gate open time(125us/125us/250us=>1ms/1ms/1ms) by change taprio sched-entry setting

the test result TAS Gate control time and cycle time are almost same as tc taprio setting

What meaning for this scenario? It means TAT gate control time been limited?

#here is remode PC cmd

iperf3 -s -i30 -p5001&

iperf3 -s -i30 -p5002&
iperf3 -s -i30 -p5003&

#here is J7200 EMV cmd

ip link set dev eth0 down
ethtool -L eth0 tx 3
ethtool --set-priv-flags eth0 p0-rx-ptype-rrobin off
ip link set dev eth0 up
tc qdisc replace dev eth0 parent root handle 100 taprio \
   num_tc 3 \
   map 0 0 1 2 0 0 0 0 0 0 0 0 0 0 0 0 \
   queues 1@0 1@1 1@2 \
   base-time 0000 \
   sched-entry S 4 100000 \
   sched-entry S 2 100000 \
   sched-entry S 1 100000 \
clockid CLOCK_TAI
tc qdisc add dev eth0 clsact
tc filter add dev eth0 egress protocol ip prio 1 u32 match ip dport 5003 0xffff action skbedit priority 3
tc filter add dev eth0 egress protocol ip prio 1 u32 match ip dport 5002 0xffff action skbedit priority 2
tc filter add dev eth0 egress protocol ip prio 1 u32 match ip dport 5001 0xffff action skbedit priority 1
ip addr add 192.168.2.20/24 dev eth0
ip link set dev eth0 up
iperf3 -c 192.168.2.10 -u -b100M -p 5003 -l1472 -t10 -i5&
iperf3 -c 192.168.2.10 -u -b100M -p 5002 -l1472 -t10 -i5&
iperf3 -c 192.168.2.10 -u -b100M -p 5001 -l1472 -t10 -i5&

wireshark test result as following:

JAY

0 Vineet Roy over 4 years ago in reply to Jay Sun

TI__Mastermind 37435 points

Hi Jay,

Sorry for the delay.

This requires some simulation and internal discussion at our end. I will get back to you in a week's time.

Regards

Vineet

0 Stefan Schandl over 4 years ago in reply to Jay Sun

Prodigy 90 points

@Jay, could you pls. tell me what you get @

tc qdisc show dev eth0

t.i.a.

0 Vineet Roy over 3 years ago in reply to Stefan Schandl

TI__Mastermind 37435 points

Hi Jay, Stefan

I see a gate timing violation with my setup (Intel i210 and DRA821 EVM running 7.3 Linux SDK)

I am investigating this

Regards

Vineet

0 Jay Sun over 3 years ago in reply to Stefan Schandl

Expert 1095 points

Hi Stefan

here is log

root@j7200-evm:/opt# tc qdisc show dev eth0
qdisc taprio 100: root refcnt 9 tc 3 map 0 0 1 2 0 0 0 0 0 0 0 0 0 0 0 0
queues offset 0 count 1 offset 1 count 1 offset 2 count 1
clockid invalid flags 0x2       base-time 0 cycle-time 500000 cycle-time-extension 0
  index 0 cmd S gatemask 0x4 interval 125000
  index 1 cmd S gatemask 0x2 interval 125000
  index 2 cmd S gatemask 0x1 interval 250000

qdisc pfifo 0: parent 100:3 limit 1000p
qdisc pfifo 0: parent 100:2 limit 1000p
qdisc pfifo 0: parent 100:1 limit 1000p
qdisc clsact ffff: parent ffff:fff1

0 Jay Sun over 3 years ago in reply to Vineet Roy

Expert 1095 points

Hi Vineet

We move to DRA821 EVM running 8.0 Linux SDK

Wireshark test result show same issue, gate timing still different with Gate Control List

(1)clinet side for J7200 EVM

#Setup interface and queue configuration
       ip link set dev eth0 down
       ethtool -L eth0 tx 3
#disable rrobin
ethtool --set-priv-flags eth0 p0-rx-ptype-rrobin off
#bring up eth0 interface
ip link set dev eth0 up

#Setup EST schedule with 3 Gates (Q0-Q2). For description of Command parameters, see manual page for taprio.
#TC0 <-> Q0, TC1 <-> Q1, and TC2 <-> Q2
tc qdisc replace dev eth0 parent root handle 100 taprio \
   num_tc 3 \
   map 0 0 1 2 0 0 0 0 0 0 0 0 0 0 0 0 \
   queues 1@0 1@1 1@2 \
   base-time 0000 \
   sched-entry S 4 125000 \
   sched-entry S 2 125000 \
   sched-entry S 0 250000 \
   flags 2
   
   tc qdisc add dev eth0 clsact
#Using tc filter command edit the SKB priority based on udp port number. i.e Udp port 5003 -> prio 3 (TC2/Q2), port 5002 -> prio 2 (TC1/Q1),  5001 -> prio 1( TC0/Q0)
#tc filter [ add | change | replace ] dev DEV [ parent qdisc-id | root ] protocol protocol prio priority filtertype [ filtertype specific param‐eters ] flowid flow-id
tc filter add dev eth0 egress protocol ip prio 1 u32 match ip dport 5003 0xffff action skbedit priority 3
tc filter add dev eth0 egress protocol ip prio 1 u32 match ip dport 5002 0xffff action skbedit priority 2
tc filter add dev eth0 egress protocol ip prio 1 u32 match ip dport 5001 0xffff action skbedit priority 1


iperf3 -c 192.168.2.10 -u -b100M  -p 5003 -l1472 -t10 -i5&
iperf3 -c 192.168.2.10 -u -b100M  -p 5002 -l1472 -t10 -i5&
iperf3 -c 192.168.2.10 -u -b100M  -p 5001 -l1472 -t10 -i5&

Test result

 [ ID] Interval           Transfer     Bitrate         Total Datagrams
[  5]   0.00-5.00   sec  59.6 MBytes   100 Mbits/sec  42453
[ ID] Interval           Transfer     Bitrate         Total Datagrams
[  5]   0.00-5.00   sec  59.6 MBytes   100 Mbits/sec  42453
[ ID] Interval           Transfer     Bitrate         Total Datagrams
[  5]   0.00-5.00   sec  59.6 MBytes   100 Mbits/sec  42454
[  537.258612] virtio_rpmsg_bus virtio1: msg received with no recipient
[  5]   5.00-10.00  sec  59.6 MBytes   100 Mbits/sec  42459
- - - - - - - - - - - - - - - - - - - - - - - - -
[ ID] Interval           Transfer     Bitrate         Jitter    Lost/Total Datagrams
[  5]   0.00-10.00  sec   119 MBytes   100 Mbits/sec  0.000 ms  0/84912 (0%)  sender
[  5]   0.00-10.00  sec   113 MBytes  94.8 Mbits/sec  0.033 ms  4403/84912 (5.2%)  receiver

iperf Done.
[  5]   5.00-10.00  sec  59.6 MBytes   100 Mbits/sec  42459
- - - - - - - - - - - - - - - - - - - - - - - - -
[ ID] Interval           Transfer     Bitrate         Jitter    Lost/Total Datagrams
[  5]   0.00-10.00  sec   119 MBytes   100 Mbits/sec  0.000 ms  0/84912 (0%)  sender
[  5]   0.00-10.00  sec   114 MBytes  95.4 Mbits/sec  0.045 ms  3923/84912 (4.6%)  receiver

iperf Done.
[  5]   5.00-10.00  sec  59.6 MBytes   100 Mbits/sec  42458
- - - - - - - - - - - - - - - - - - - - - - - - -
[ ID] Interval           Transfer     Bitrate         Jitter    Lost/Total Datagrams
[  5]   0.00-10.00  sec   119 MBytes   100 Mbits/sec  0.000 ms  0/84912 (0%)  sender
[  5]   0.00-10.00  sec   113 MBytes  95.0 Mbits/sec  0.040 ms  4266/84912 (5%)  receiver

iperf Done.

(2)sever side for ubuntu

iperf3 -s -i30 -p5001&
iperf3 -s -i30 -p5002&
iperf3 -s -i30 -p5003&

test result

-----------------------------------------------------------
Accepted connection from 192.168.2.49, port 50154
[  5] local 192.168.2.10 port 5003 connected to 192.168.2.49 port 57484
Accepted connection from 192.168.2.49, port 37764
[  5] local 192.168.2.10 port 5002 connected to 192.168.2.49 port 60738
Accepted connection from 192.168.2.49, port 60560
[  5] local 192.168.2.10 port 5001 connected to 192.168.2.49 port 37236
[ ID] Interval           Transfer     Bandwidth       Jitter    Lost/Total Datagrams
[  5]   0.00-10.00  sec   113 MBytes  94.8 Mbits/sec  0.033 ms  4403/84912 (5.2%)  
- - - - - - - - - - - - - - - - - - - - - - - - -
[ ID] Interval           Transfer     Bandwidth       Jitter    Lost/Total Datagrams
[  5]   0.00-10.00  sec  0.00 Bytes  0.00 bits/sec  0.033 ms  4403/84912 (5.2%)  
-----------------------------------------------------------
Server listening on 5003
-----------------------------------------------------------
[ ID] Interval           Transfer     Bandwidth       Jitter    Lost/Total Datagrams
[  5]   0.00-10.00  sec   114 MBytes  95.4 Mbits/sec  0.045 ms  3923/84912 (4.6%)  
- - - - - - - - - - - - - - - - - - - - - - - - -
[ ID] Interval           Transfer     Bandwidth       Jitter    Lost/Total Datagrams
[  5]   0.00-10.00  sec  0.00 Bytes  0.00 bits/sec  0.045 ms  3923/84912 (4.6%)  
-----------------------------------------------------------
Server listening on 5002
-----------------------------------------------------------
[ ID] Interval           Transfer     Bandwidth       Jitter    Lost/Total Datagrams
[  5]   0.00-10.00  sec   113 MBytes  95.0 Mbits/sec  0.040 ms  4266/84912 (5%)  
- - - - - - - - - - - - - - - - - - - - - - - - -
[ ID] Interval           Transfer     Bandwidth       Jitter    Lost/Total Datagrams
[  5]   0.00-10.00  sec  0.00 Bytes  0.00 bits/sec  0.040 ms  4266/84912 (5%)  
-----------------------------------------------------------
Server listening on 5001
-----------------------------------------------------------

(3) Wireshark log

JAY

0 Vineet Roy over 3 years ago in reply to Jay Sun

TI__Mastermind 37435 points

Hi Jay,

I will test this on a Spirent device to make sure that we have the right timestamps and report back.

Regards

Vineet

0 Stefan Schandl over 3 years ago in reply to Jay Sun

Prodigy 90 points

thank you Jay, very much like mine

0 Vineet Roy over 3 years ago in reply to Stefan Schandl

TI__Mastermind 37435 points

Hi Jay,

Similar to my comment on the other TSN thread

I found out that the TSN features (EST and IET) for CPSW 2G were never actually tested on J7200. It got added because the support was added for another SoC (AM65 and AM64) and since the IP is identical on all three, it was added to the documentation.

I don't think it makes sense to debug this issue here until official support is added, which will be in Q4 2021 (SDK 8.1). I will close this ticket for now and we can re-visit this post SDK 8.1

Apologies for any confusion.

Regards

Vineet

Processors

Processors forum

DRA821U: CPSW2G + TSN demo