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TMS320C6657: Order before and after the start of the falling sequence

O.H
Mastermind 6330 points
Part Number: TMS320C6657

Hi experts,

Please let me confirm about the power down sequence.

In the datasheet "6.3.2 Power-Down Sequence", it is stated that the power down sequence request is the reverse of the power up request (6.3.1 Power-Supply Sequencing). From this, we understand that the falling edge of the power supply must satisfy either of the following:
(1) DVDD15 ->DVDD18 -> CVDD1 -> CVDD
(2) DVDD15 -> CVDD1 -> CVDD -> DVDD18

The customer created a board using C6657 and checked the Power-Down Sequence, and the waveform was as follows.

  • The timing of the start of the falling edge satisfies (1). (The falling edge starts in the order of (1) at an interval of about 200ns.
  • The timing at which each power supply reaches the lower limit of the recommended operating range is CVDD1 -> CVDD -> DVDD15=DVDD18, which does not meet the above regulation. (The above diagram is just an image and the actual waveform is as shown in this text.)
  • The timing at which each power supply becomes 0V is CVDD1 -> DVDD15 -> CVDD -> DVDD18, which does not meet the above regulation.
  • All power supplies reach 0V within 13ms.

Question 1: Which of the following applies to the Power-Down Sequence explained above?

  • There is no problem because the timing of the start of falling edge satisfies (1).
  • There is no problem because all power supplies reach 0V within 13ms, although it is hard to say that it meets the requirement.
  • There is a problem because it is not recommended in the datasheet.

Question 2: If the answer to question 1 is "there is a problem", is the following guess correct?

  • The current consumption increases when the power is turned off, but the device is not damaged. (It is possible to use the device as it is if there are sufficient heat generation measures and power supply capacity.)
  • There is a possibility that the life of the device will be shortened.
  • There is a possibility that the device will be damaged.

I asked this question because I couldn't decide whether the Power-Down Sequence like this waveform is a problem or not.

Best Regards,
O.H

  • 0
    Prodigy 220 points

    O.H.,

    I am surprised that the sequencing logic operates on a 200ns step between disables.  Power supplies normally take several ms to turn on and many ms to ramp down.  I recommend a time delta of 10ms when you sequence through the supply turn-off.

    Question 1: Which of the following applies to the Power-Down Sequence explained above?

    • There is a problem because it violates the guidance provided in the datasheet.

    Question 2: If the answer to question 1 is "there is a problem", is the following guess correct?

    • There is a possibility that the life of the device will be shortened.
    • There is a possibility that the device will be damaged.

    When the supplies ramp down in the incorrect order, there is the possibility of forward biasing parasitic PN junctions that can cause damage.  The reliability impact has not been quantified but there is a chance of negative impact.

    Tom

  • 0 in reply to Thomas Johnson2
    Mastermind 6330 points

    Hi Tom,

    Thank you for your answer. I understood.

    I will tell them to meet the datasheet requirements for the sequence during ramp-down as well as the sequence at the beginning of the turn-off.

    Thomas Johnson2 said:
    I recommend a time delta of 10ms when you sequence through the supply turn-off.

    Incidentally, am I correct in assuming that "delta of 10ms" is the part that replaces "interval of about 200ns"? I understand that it is better to have a margin of 10ms instead of 200ns. Please let me know if I'm wrong.

    Best regards,
    O.H

  • 0 in reply to O.H
    Prodigy 220 points

    O.H.,

    Since the power supply turn-on and turn-off is on the order of ms, then the time steps of the sequence should be on the order of 10ms per step.

    Tom