Hi, I have two questions.
When I access DDR_0_DATA area of device memory map (00 8000 0000~), I got error message as below:
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Trouble Reading Memory Block at 0x80000000 on Page 0 of Length 0x17d:
(Error -1202 @ 0x80000000)
Device core is hung. The debugger will attempt to force the device to a ready state to recover debug control. Your application's state will be corrupt. You should have limited access to memory and registers, but you may need to reset the device to debug further.
(Emulation package 9.2.0.00002)
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By memory browser of CCS, DDR_0_DATA area(00 8000 0000~) are displayed as ”???????? ???????? ....".
Question(1) I cannot access DDR_0_DATA area. What's happned? Why this error message is outputted?
【situation】
Target board is our designed PCB (not EVM), which is just completed building.
I am going to access memory browser of CCS. S/W is not installed, only GEL file is used.
The GEL file is edited based on evmk2g.gel which is installed with CCS(The GEL file location : C:\ti\ccs1010\ccs\ccs_base\emulation\boards\evmk2g\gel).
I reflected resister setting by EXCEL "Keystone2 DDR3 Register Calculations" in the edited GEL file.
Emulator is XDS560v2 USB, other memory map area can be accessed (for example, GPIO) and connection with DSP is no problem.
BOOTMODE[15:0] = 2040h (Sleep boot (no boot))
S/W (RTOS and u-boot) has not completed yet. But I would like to confirm resister settings and H/W behavior before completion of S/W.
So, BOOTCOMPLETE is not finished. Does that have anything to do with this?
So far, I would like to just confirm resister settings, H/W behavior and memory read/write action by memory brower of CCS without S/W.
Question(2) Is there any method for BOOTCOMPLETE with only GEL file?
Regards.
