Part Number: 66AK2G12
Other Parts Discussed in Thread: TMS320C6746
Hi,
I configure timer0, timer1 and timer2 to halt on emulation suspend by making FREE and SOFT bits to zero in TIMER_EMUMGT_CLKSPD register. But when I observe the counter registers while debugging , they are not halted on a suspend event. I worked with TMS320C6746 DSP where it used to work as expected. Can anyone explain this behavior?
Regards,
Vishnu