Other Parts Discussed in Thread: DRA821, SYSCONFIG
Hi,
When i was going through the DRA821 reference manual, came across below statements.
The device has six instances of GPIO modules. The GPIO modules are integrated in two groups.
• Group one: WKUP_GPIO0 and WKUP_GPIO1. On I/O pins this group is named WKUP_GPIO0.
• Group two: GPIO0, GPIO2, GPIO4, and GPIO6. On I/O pins this group is named GPIO0.
The GPIO pins are grouped into banks (16 pins per bank and 9 banks per module), which means that each
GPIO module provides up to 144 dedicated general-purpose pins with input and output capabilities.
As we have six modules it is expected to have 6*144 pins. but below statement is different.
The general-purpose interface supports up to 288 (2 group instances × (9 banks × 16 pins)) I/O pins. Which is contradicting.
In Linux dts file "arch/arm64/boot/dts/ti/k3-j7200-main.dtsi", for 4 modules 69gpios are exposed as below. 69 used here as 69:144 are reserved.
main_gpio4: gpio@620000 {
compatible = "ti,j721e-gpio", "ti,keystone-gpio";
reg = <0x0 0x00620000 0x0 0x100>;
gpio-controller;
#gpio-cells = <2>;
interrupt-parent = <&main_gpio_intr>;
interrupts = <163>, <164>, <165>, <166>,
<167>;
interrupt-controller;
#interrupt-cells = <2>;
ti,ngpio = <69>;
ti,davinci-gpio-unbanked = <0>;
power-domains = <&k3_pds 109 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 109 0>;
clock-names = "gpio";
};
main_gpio6: gpio@630000 {
compatible = "ti,j721e-gpio", "ti,keystone-gpio";
reg = <0x0 0x00630000 0x0 0x100>;
gpio-controller;
#gpio-cells = <2>;
interrupt-parent = <&main_gpio_intr>;
interrupts = <172>, <173>, <174>, <175>,
<176>;
interrupt-controller;
#interrupt-cells = <2>;
ti,ngpio = <69>;
ti,davinci-gpio-unbanked = <0>;
power-domains = <&k3_pds 111 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 111 0>;
clock-names = "gpio";
};
From sysconfig app also it is showing only 69pins for GPIO0, there is no GPIO2,GPIO4 and GPIO6. Please confirm the same.
