Processors

Processors forum

State Resolved
Locked Locked
Replies 3 replies
Subscribers 98 subscribers
Views 313 views
Users 0 members are here

Support feedback

Options

Options

Related

TMS320C6657: unused serial ports and clock input signals

Lenio Cacula

Genius 16700 points

Part Number: TMS320C6657

When not using the Hyperlink or Serial Rapid IO interfaces, but still using the PCI-E interface, should the clock signals of the unused interfaces be maintained in a static state (1kΩ to ground on the N pin)? The datasheet mentions that, but the use of the PCIe by this customer makes me uncertain of the best recommendation.

Thank you!

over 4 years ago

0 kcastille over 4 years ago

TI__Guru 54382 points

Hello,

Can you point to where that is recommended in the datasheet?

Regards,

Kyle

0 Lenio Cacula over 4 years ago in reply to kcastille

TI__Genius 16700 points

In section 6.3.1 and Table 6-4. It recommends pulling down the N side of the unused clock input with a 1kΩ resistor.

+1 kcastille over 4 years ago in reply to Lenio Cacula

TI__Guru 54382 points

Lenio,

Ok, thanks for the pointers. The datasheet seems clear in this respect -

"

The clock input buffers for CORECLK, DDRCLK, SRIOSGMIICLK, MCMCLK, and PCIECLK use only

CVDD as a supply voltage ... <snip> ...

If a clock input is not used it must be held in a static state. To accomplish this the N leg should be pulled

to ground through a 1 kΩ resistor. The P leg should be tied to CVDD to ensure it will not have any voltage

present until CVDD is active"

So in addition to your question (1kOhm to ground on the N pin) you should tie the P pin to CVDD.

Regards,

Kyle