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AM3358: Design query

Yash Gandhi
Prodigy 30 points

Part Number: AM3358

AM3358

Hi,

Please find attached design query related AM3358.

Thanks,

Yash Gandhi

  • 0
    TI__Guru 61700 points

    Hi,

    Can you please attach the file to your post instead of sending a Google docs link? We can't access Google docs inside TI network.

    Thank you for your understanding.

    Regards,

    Jianzhong

  • 0 in reply to Jianzhong Xu
    Prodigy 30 points

    Hi Jianzhong, 

    Design query for AM3358:

    Sr no Section Interface Query
    1 TMDSSK3358_1.3A EVM DDR RAM Please share compatible DDR3 Chipset list for AM3358
    2 TMDSSK3358_1.3A EVM PMIC TPS65910A3A1 not available, Please provide alternate for TPS65910A3A1.
    3 TMDSSK3358_1.3A EVM PMIC Any advantage of using TPS65910A3A1 PMIC over regular DCDC? PMIC looks more complex and expensive than DCDC.
    4 TMDSSK3358_1.3A EVM DDR Do we need DDR termination regulator for single DDR IC? We can see TPS52100 used on TMDSSK3358_1.3A EVM. But as per "AM335x Schematic Checklist" document, no need of Termination regulator for point to point DDR3 topology
    5 TMDSSK3358_1.3A EVM PMIC Do we need tactile button on PWRON (EXP_PB_POWERON) in PMIC (TPS65910A3) ? if yes how to bypass it in final design?
  • 0 in reply to Yash Gandhi
    TI__Guru 61700 points

    Thank you for providing the information. I'll pass this to the right person who will assist you.

    Regards,

    Jianzhong

  • 0 in reply to Jianzhong Xu
    TI__Guru* 93741 points

    1.  We do not provide specific lists.  DDR3 devices which follow the JEDEC standard for DDR3 will be compatible with AM3358

     2.  You can check https://www.ti.com/lit/pdf/slvaee2 for PMIC selection for AM335x

    3. PMICs generally provide an integrated solution and proper power sequencing.  Discrete devices will generally be less expensive, but you will have to ensure proper sequencing and voltage levels. 

    4. If you have a single package DDR, point to point design for both address and data, you do not need VTT regulator.  See section   7.7.2.3.3.9 in the datasheet.  We recommend performing signal integrity analysis before implementing this topology.

    5. You will have to ask this separately to get it routed to the PMIC team

    Regards,

    James