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TDA4VM: Problem about TIDL simulation. The input is 10 channel float raw data

Part Number: TDA4VM

Hi I have some problem about TIDL simulation.

The input of our model is 1x10x128x512 float raw data, not image. First, we test our model on TIDL in float32, and the output of TIDL is the same as pytorch. Then we test our model in int16, and we find that the output of TIDL is much different from pytorch. We think the problem is the input data. Because our input data is float32, so when testing float32 and int16 model in TIDL, the input will be different.

Can you give us some advise to deal with this problem? Do we need to set some extra commands when importing and testing TIDL model?

  • Hi, bro, have the problem resolved? I encounter the same problem with you, do you have any solutions to deal with the problem? Could you share it?

  • Nope, we haven't solved problem yet.

  • Hi, yizhao, I have solved the problem. There are two position you need to modify.

    (1) in the function of tidl_ReadNetInput in tidl_tb_utils.c, add the following code

    if(params->inFileFormat == 1)
    {
        elementSizeBytes = tidltb_getDatElementSize(ioPrms->rawDataInElementType[numBuffs]);
        char ponitcloudFileName[500];
        getFileNameAndIdxFromList((char*)params->inData, frameCount, numBuffs, ponitcloudFileName);
        readRawFeatureData(ponitcloudFileName, (float32_tidl *)ins[numBuffs]->ptrc, w, h, sizeof(float));
    }
    and the readRawFeatureData is as follows
    int32_t readRawFeatureData(char *fileNamevoid *ptrint16_t nint16_t widthint16_t heightint32_t elemSize)
    {
        TI_FILE * fptr = FOPEN(fileName, "rb");
        int32_t freadStatus = FREAD(ptr, elemSize, n * width * height, fptr);
        if(freadStatus != (width * height * n * elemSize))
        {
            return 0;
        }
        return 1;
    }
    in test directory, recompile the code
    make TARGET_PLATFORM=PC
    (2) refer the following import configs, try different inQuantFactor, here in my case inQuantFactor = 64 is able to generate the correct results
    modelType = 2
    numParamBits = 8
    numFeatureBits = 8
    inputNetFile = "../../test/testvecs/models/public/onnx/polaris/model.onnx"
    outputNetFile = "../../test/testvecs/config/tidl_models/onnx/tidl_net_model.bin"
    outputParamsFile = "../../test/testvecs/config/tidl_models/onnx/tidl_io_model_"
    inWidth = 1024
    inHeight = 320
    inNumChannels = 8

    inQuantFactor = 64

    rawDataInElementType = 6

    inElementType = 1
    outElementType = 1
    inFileFormat = 1
    inData = ../../test/testvecs/config/feature.txt
    enableHighResOptimization = 1
    enableLayerPerfTraces = 1
    postProcType = 0
    numFrames = 10
    perfSimConfig = ../../test/testvecs/config/import/device_config.cfg

    hope this can help you.
  • The input data to TIDL during inference is expected to be in either fixed point 8-bit or 16-bit. Float32 bit mode is provided only for validation purposes.

    Below Parameter can be used for the cases whether your input file different from model exeuction time

    rawDataInElementType This parameter is only applicable when inFileFormat is 1 and indicates the raw file's format. TIDL-RT test bench performs a conversion from rawDataInElementType to inElementType when these 2 are not same.
    " Supported values are:
    0 : unsigned char
    1 : signed char
    2 : unsigned short
    3 : signed short
    6 : float

    software-dl.ti.com/.../md_tidl_sample_test.html

    BTW, we recommend using Open Source Runtime APIs to avoid running into such issues.

    https://software-dl.ti.com/jacinto7/esd/processor-sdk-rtos-jacinto7/08_00_00_12/exports/docs/tidl_j7_08_00_00_10/ti_dl/docs/user_guide_html/usergroup0.html

    More details on the same and examples (Python/C++) can be found here

    github.com/.../edgeai-tidl-tools