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PROCESSOR-SDK-AM64X: AM64x Eval Board - Debugger failure

Part Number: PROCESSOR-SDK-AM64X

So - I have the Mistral AM64x eval board.

Out of the box, the linux boot from SD Card worked - which gave me some confidence the board is OK.

I went through the setup, flashing the boot loader and re-configuring the DIP switches as per the setup guide.

When I start the board, I see the bootloader on the COM: port...

Starting NULL Bootloader ...

DMSC Firmware Version 21.5.0--v2021.05 (Terrific Llam
DMSC Firmware revision 0x15
DMSC ABI revision 3.1

INFO: Bootloader_runCpu:147: CPU r5f1-0  is initialized to 800000000 Hz !!!
INFO: Bootloader_runCpu:147: CPU r5f1-1 is initialized to 800000000 Hz !!!
INFO: Bootloader_runCpu:147: CPU m4f0-0 is initialized to 400000000 Hz !!!
INFO: Bootloader_runCpu:147: CPU a530-0 is initialized to 800000000 Hz !!!
INFO: Bootloader_runCpu:147: CPU a530-1 is initialized to 800000000 Hz !!!
INFO: Bootloader_loadSelfCpu:199: CPU r5f0-0 is initialized to 800000000 Hz !!!
INFO: Bootloader_loadSelfCpu:199: CPU r5f0-1 is initialized to 800000000 Hz !!!
INFO: Bootloader_runSelfCpu:216: All done, reseting self ...

So far so good...

I fire up Code Composer, and import gpio_led_blink_am64x-evm_m4fss0-0_nortos_ti_arm_clang

It builds fine and when I hit 'Debug' the system starts talking to the debugger - there's lots of activity with popups and progress bars flashing past quickly... until it stops and I get the error:

CS_DAP_0: Error connecting to the target: (Error -1170 @ 0x0) Unable to access the DAP. Reset the device, and retry the operation. If error persists, confirm configuration, power-cycle the board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 9.4.0.00129)

So, as it suggests I reduce the debugger TCLK from 5.5MHz to 2.5MHz then 1MHz. - still the exact same error.

If I use the XDS Configuration screens to check communications, everything is OK - even at 5.5MHz.

So, digging around with Google there are some hints

The main one which gave me short-lived hope was this note https://software-dl.ti.com/ccs/esd/documents/ccsv7_debugging_jtag_connectivity_issues.html#Cannot_access_the_DAP

However the only seemingly relevant section to Sitara is to check point #8 here: https://software-dl.ti.com/ccs/esd/documents/ccsv7_debugging_jtag_connectivity_issues.html#troubleshooting-the-connect-phase

This, then refers to something called ICEPICK which is apparently an option when you 'show all cores' in the debug view... except this option is greyed out because of the Error -1170 preventing the debugger from connecting.

So that leaves me at an impasse.

It's probably a step I've missed or an undocumented step that needs doing.

Can anyone help?

Andy