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I have tried your TSN example and failed to reproduce it on my EVM.
1. Can you supply documentation on CPSW2G (like programming manual)?
2. Can you supply documentation w.r.t. the TI AM65x switch-config tool?
3. Can you identify what is going wrong if i supply the results of running "switch-config -D0"?
t.i.a.
So I modified the procedure to send on the test ports successively, i.e. port 5003 for 5s, afterwards port 5002 for 5s, then port 5001 for another 5s.
iperf3 -c 192.168.1.30 -u -b100M -p 5003 -l1472 -t5 -i5 sleep 0.1 iperf3 -c 192.168.1.30 -u -b100M -p 5002 -l1472 -t5 -i5 sleep 0.1 iperf3 -c 192.168.1.30 -u -b100M -p 5001 -l1472 -t5 -i5
That seems to work! at settings
| gate time | UDP port | prio | traffic class |
|---|---|---|---|
| 2.5ms | 5003 | 3 | TC2 |
| 2.5ms | 5002 | 2 | TC1 |
| 5.0ms | 5001 | 1 | TC0 |
I observe rates of 25 / 25 / 50 Mbps on the ports and the gate timings relative for each port seem to be correct. I cannot observe the three queue timings in relation to each other though, because when I start the 3 iperf3 clients simultaneously, I receive traffic on port 5001 only.
Still with the above switch configuration, but with a considerable reduction of the tx rate of the iperf3 clients (running in parallel) to 10Mbps, each, I get results as you would expect, e.g.
| time stamp | port | gate duration [ms] |
| 16,126357 | 5003 | 2,24 |
| 16,128599 | 5002 | 2,50 |
| 16,131104 | 5001 | 4,93 |
| 16,136029 | 5003 | 2,71 |
| 16,138736 | 5002 | 2,76 |
| 16,141497 | 5001 | 4,84 |
| 16,146334 | 5003 | 2,37 |
| 16,148705 | 5002 | 2,14 |
| 16,150848 | 5001 | 5,12 |
| 16,155965 | 5003 | 2,71 |
| 16,158672 | 5002 |
The way the example is configured it is mapping the UDP ports to TC at egress, maybe the filtering should be done earlier (how?). Still, the switch should not be over-loaded at 3 x 100Mbps, right?
Hi Stefan,
Sorry for the delay.
See my comment here https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1011289/dra821u-cpsw2g-tsn-demo/3835476#3835476
I found out that the TSN features (EST and IET) for CPSW 2G were never actually tested on J7200. It got added because the support was added for another SoC (AM65 and AM64) and since the IP is identical on all three, it was added to the documentation.
I don't think it makes sense to debug this issue here until official support is added, which will be in Q4 2021 (SDK 8.1). I will close this ticket for now and we can re-visit this post SDK 8.1
Apologies for any confusion.
Regards
Vineet
Thank you Vineet,
just for clarification:
best Stefan
Hi Stefan,
See my replies inline
would this affect also CPSW2G under RTOS or is this a linux related issue only?
TSN for CPSW2G (RTOS) is planned in SDK 8.2 (End of March 2022), there is no RTOS support for TSN right now.
1. Can you supply documentation on CPSW2G (like programming manual)?
Can you take a look at 12.2.1.5 MCU_CPSW0 Programming Guide in TRM ? Please also take a look at this link , there is a lot of information on CPSW 9G mixed in with CPSW 2G (both IP's are essentially the same)
2. Can you supply documentation w.r.t. the TI AM65x switch-config tool?
I will check and let you know
3. Can you identify what is going wrong if i supply the results of running "switch-config -D0"?
I can check internally, please provide the logs.
Regards
Vineet
Hi Stefan,
Can you please create another ticket for generic issues with CPSW 2G ? This is for TSN and so we should close this if no further questions.
Regards
Vineet
hi Vineet,
running the attached script configure-TSN.sh, and afterwards running "switch-config -D0 > config.txt" to produce the latter
best Stefan
K3 cpsw dump version (1) len(6328) cpsw-nuss regdump: num_regs(16) 00000000:reg(6BA00101) 00000004:reg(00000000) 00000008:reg(00000000) 0000000c:reg(00000000) 00000010:reg(00000001) 00000014:reg(00000000) 00000018:reg(00000000) 0000001c:reg(00000000) cpsw-nuss-rgmii-status regdump: num_regs(16) 00000030:reg(0000000B) 00000034:reg(00000000) 00000038:reg(00000000) 0000003c:reg(00000000) 00000040:reg(00000000) 00000044:reg(00000000) 00000048:reg(00000000) 0000004c:reg(00000000) cpsw-nuss-mdio regdump: num_regs(128) 00000f00:reg(00070907) 00000f04:reg(8100014C) 00000f08:reg(00000001) 00000f0c:reg(00000001) 00000f10:reg(00000003) 00000f14:reg(00000000) 00000f18:reg(00000000) 00000f1c:reg(00000000) 00000f20:reg(00000001) 00000f24:reg(00000000) 00000f28:reg(00000000) 00000f2c:reg(00000000) 00000f30:reg(00000001) 00000f34:reg(00000000) 00000f38:reg(FFFFFFFF) 00000f3c:reg(00000000) 00000f40:reg(00000000) 00000f44:reg(00000000) 00000f48:reg(00000000) 00000f4c:reg(00000000) 00000f50:reg(00000000) 00000f54:reg(00000000) 00000f58:reg(00000000) 00000f5c:reg(00000000) 00000f60:reg(00000000) 00000f64:reg(00000000) 00000f68:reg(00000000) 00000f6c:reg(00000000) 00000f70:reg(00000000) 00000f74:reg(00000000) 00000f78:reg(00000000) 00000f7c:reg(00000000) 00000f80:reg(2020796D) 00000f84:reg(00000000) 00000f88:reg(00000000) 00000f8c:reg(00000000) 00000f90:reg(00000000) 00000f94:reg(00000000) 00000f98:reg(00000000) 00000f9c:reg(00000000) 00000fa0:reg(00000000) 00000fa4:reg(00000000) 00000fa8:reg(00000000) 00000fac:reg(00000000) 00000fb0:reg(00000000) 00000fb4:reg(00000000) 00000fb8:reg(00000000) 00000fbc:reg(00000000) 00000fc0:reg(00000000) 00000fc4:reg(00000000) 00000fc8:reg(00000000) 00000fcc:reg(00000000) 00000fd0:reg(00000000) 00000fd4:reg(00000000) 00000fd8:reg(00000000) 00000fdc:reg(00000000) 00000fe0:reg(00000000) 00000fe4:reg(00000000) 00000fe8:reg(00000000) 00000fec:reg(00000000) 00000ff0:reg(00000000) 00000ff4:reg(00000000) 00000ff8:reg(00000000) 00000ffc:reg(00000000) cpsw-nu regdump: num_regs(144) 00020000:reg(6BA80100) 00020004:reg(00046006) 00020008:reg(00000000) 0002000c:reg(00000000) 00020010:reg(00000000) 00020014:reg(00000003) 00020018:reg(00000000) 0002001c:reg(00000000) 00020020:reg(00003001) 00020024:reg(0000000B) 00020028:reg(00000008) 0002002c:reg(00000000) 00020030:reg(FFFFFFFF) 00020034:reg(00000000) 00020038:reg(FFFFFFFF) 0002003c:reg(FFFFFFFF) 00020040:reg(00000000) 00020044:reg(00000000) 00020048:reg(00000000) 0002004c:reg(00000000) 00020050:reg(88A88100) 00020054:reg(00000000) 00020058:reg(00000000) 0002005c:reg(00000000) 00020060:reg(00000000) 00020064:reg(00000000) 00020068:reg(00000000) 0002006c:reg(00000000) 00020070:reg(00000000) 00020074:reg(00000000) 00020078:reg(00000000) 0002007c:reg(00000000) 00020080:reg(00000000) 00020084:reg(00000000) 00020088:reg(00000000) 0002008c:reg(00000000) 00020090:reg(00000000) 00020094:reg(00000000) 00020098:reg(00000000) 0002009c:reg(00000000) 000200a0:reg(00000000) 000200a4:reg(00000000) 000200a8:reg(00000000) 000200ac:reg(00000000) 000200b0:reg(00000000) 000200b4:reg(00000000) 000200b8:reg(00000000) 000200bc:reg(00000000) 000200c0:reg(00000000) 000200c4:reg(00000000) 000200c8:reg(00000000) 000200cc:reg(00000000) 000200d0:reg(00000000) 000200d4:reg(00000000) 000200d8:reg(00000000) 000200dc:reg(00000000) 000200e0:reg(00000000) 000200e4:reg(00000000) 000200e8:reg(00000000) 000200ec:reg(00000000) 000200f0:reg(00000000) 000200f4:reg(00000000) 000200f8:reg(00000000) 000200fc:reg(00000000) 00020100:reg(000007E8) 00020104:reg(000007E8) 00020108:reg(000007E8) 0002010c:reg(000007E8) 00020110:reg(000007E8) 00020114:reg(000007E8) 00020118:reg(000007E8) 0002011c:reg(000007E8) cpsw-nu-p0 regdump: num_regs(402) 00021000:reg(00000000) 00021004:reg(00010001) 00021008:reg(00000030) 0002100c:reg(00000000) 00021010:reg(00000002) 00021014:reg(00000000) 00021018:reg(76543210) 0002101c:reg(00000000) 00021020:reg(76543210) 00021024:reg(000005F2) 00021028:reg(01245678) 0002102c:reg(00000000) 00021030:reg(00000000) 00021034:reg(00000000) 00021038:reg(00000060) 0002103c:reg(00000000) 00021040:reg(00000000) 00021044:reg(00000000) 00021048:reg(00000000) 0002104c:reg(01000000) 00021050:reg(00000000) 00021054:reg(00000000) 00021058:reg(00000000) 0002105c:reg(00000000) 00021060:reg(00000000) 00021064:reg(00000000) 00021068:reg(00000000) 0002106c:reg(00000000) 00021070:reg(00000000) 00021074:reg(00000000) 00021078:reg(00000000) 0002107c:reg(00000000) 00021080:reg(00000000) 00021084:reg(00000000) 00021088:reg(00000000) 0002108c:reg(00000000) 00021090:reg(00000000) 00021094:reg(00000000) 00021098:reg(00000000) 0002109c:reg(00000000) 000210a0:reg(00000000) 000210a4:reg(00000000) 000210a8:reg(00000000) 000210ac:reg(00000000) 000210b0:reg(00000000) 000210b4:reg(00000000) 000210b8:reg(00000000) 000210bc:reg(00000000) 000210c0:reg(00000000) 000210c4:reg(00000000) 000210c8:reg(00000000) 000210cc:reg(00000000) 000210d0:reg(00000000) 000210d4:reg(00000000) 000210d8:reg(00000000) 000210dc:reg(00000000) 000210e0:reg(00000000) 000210e4:reg(00000000) 000210e8:reg(00000000) 000210ec:reg(00000000) 000210f0:reg(00000000) 000210f4:reg(00000000) 000210f8:reg(00000000) 000210fc:reg(00000000) 00021100:reg(00000000) 00021104:reg(00000000) 00021108:reg(00000000) 0002110c:reg(00000000) 00021110:reg(00000000) 00021114:reg(00000000) 00021118:reg(00000000) 0002111c:reg(00000000) 00021120:reg(00000000) 00021124:reg(00000000) 00021128:reg(00000000) 0002112c:reg(00000000) 00021130:reg(00000000) 00021134:reg(00000000) 00021138:reg(00000000) 0002113c:reg(00000000) 00021140:reg(00000000) 00021144:reg(00000000) 00021148:reg(00000000) 0002114c:reg(00000000) 00021150:reg(00000000) 00021154:reg(00000000) 00021158:reg(00000000) 0002115c:reg(00000000) 00021160:reg(00000000) 00021164:reg(00000000) 00021168:reg(00000000) 0002116c:reg(00000000) 00021170:reg(00000000) 00021174:reg(00000000) 00021178:reg(00000000) 0002117c:reg(00000000) 00021180:reg(1F1F1F1F) 00021184:reg(1F1F1F1F) 00021188:reg(00000000) 0002118c:reg(00000000) 00021190:reg(1F1F1F1F) 00021194:reg(1F1F1F1F) 00021198:reg(00000000) 0002119c:reg(00000000) 000211a0:reg(00000000) 000211a4:reg(00000000) 000211a8:reg(00000000) 000211ac:reg(00000000) 000211b0:reg(00000000) 000211b4:reg(00000000) 000211b8:reg(00000000) 000211bc:reg(00000000) 000211c0:reg(00000000) 000211c4:reg(00000000) 000211c8:reg(00000000) 000211cc:reg(00000000) 000211d0:reg(00000000) 000211d4:reg(00000000) 000211d8:reg(00000000) 000211dc:reg(00000000) 000211e0:reg(00000000) 000211e4:reg(00000000) 000211e8:reg(00000000) 000211ec:reg(00000000) 000211f0:reg(00000000) 000211f4:reg(00000000) 000211f8:reg(00000000) 000211fc:reg(00000000) 00021200:reg(00000000) 00021204:reg(00000000) 00021208:reg(00000000) 0002120c:reg(00000000) 00021210:reg(00000000) 00021214:reg(00000000) 00021218:reg(00000000) 0002121c:reg(00000000) 00021220:reg(00000000) 00021224:reg(00000000) 00021228:reg(00000000) 0002122c:reg(00000000) 00021230:reg(00000000) 00021234:reg(00000000) 00021238:reg(00000000) 0002123c:reg(00000000) 00021240:reg(00000000) 00021244:reg(00000000) 00021248:reg(00000000) 0002124c:reg(00000000) 00021250:reg(00000000) 00021254:reg(00000000) 00021258:reg(00000000) 0002125c:reg(00000000) 00021260:reg(00000000) 00021264:reg(00000000) 00021268:reg(00000000) 0002126c:reg(00000000) 00021270:reg(00000000) 00021274:reg(00000000) 00021278:reg(00000000) 0002127c:reg(00000000) 00021280:reg(00000000) 00021284:reg(00000000) 00021288:reg(00000000) 0002128c:reg(00000000) 00021290:reg(00000000) 00021294:reg(00000000) 00021298:reg(00000000) 0002129c:reg(00000000) 000212a0:reg(00000000) 000212a4:reg(00000000) 000212a8:reg(00000000) 000212ac:reg(00000000) 000212b0:reg(00000000) 000212b4:reg(00000000) 000212b8:reg(00000000) 000212bc:reg(00000000) 000212c0:reg(00000000) 000212c4:reg(00000000) 000212c8:reg(00000000) 000212cc:reg(00000000) 000212d0:reg(00000000) 000212d4:reg(00000000) 000212d8:reg(00000000) 000212dc:reg(00000000) 000212e0:reg(00000000) 000212e4:reg(00000000) 000212e8:reg(00000000) 000212ec:reg(00000000) 000212f0:reg(00000000) 000212f4:reg(00000000) 000212f8:reg(00000000) 000212fc:reg(00000000) 00021300:reg(04030201) 00021304:reg(08070605) 00021308:reg(00000000) 0002130c:reg(00000000) 00021310:reg(00000000) 00021314:reg(00000000) 00021318:reg(00000000) 0002131c:reg(00000000) 00021320:reg(00000000) cpsw-nu-p1 regdump: num_regs(468) 00022000:reg(00000000) 00022004:reg(00020000) 00022008:reg(00001004) 0002200c:reg(00000000) 00022010:reg(00000002) 00022014:reg(00000000) 00022018:reg(76543210) 0002201c:reg(00009000) 00022020:reg(76543210) 00022024:reg(000005F2) 00022028:reg(01245678) 0002202c:reg(00000040) 00022030:reg(00000000) 00022034:reg(00000000) 00022038:reg(00000060) 0002203c:reg(00000000) 00022040:reg(00000000) 00022044:reg(00000000) 00022048:reg(001312D0) 0002204c:reg(00000000) 00022050:reg(0004FF00) 00022054:reg(00000000) 00022058:reg(00000000) 0002205c:reg(00000000) 00022060:reg(00000002) 00022064:reg(00000000) 00022068:reg(00000000) 0002206c:reg(00000000) 00022070:reg(00000000) 00022074:reg(00000000) 00022078:reg(00000000) 0002207c:reg(00000000) 00022080:reg(00000000) 00022084:reg(00000000) 00022088:reg(00000000) 0002208c:reg(00000000) 00022090:reg(00000000) 00022094:reg(00000000) 00022098:reg(00000000) 0002209c:reg(00000000) 000220a0:reg(00000000) 000220a4:reg(00000000) 000220a8:reg(00000000) 000220ac:reg(00000000) 000220b0:reg(00000000) 000220b4:reg(00000000) 000220b8:reg(00000000) 000220bc:reg(00000000) 000220c0:reg(00000000) 000220c4:reg(00000000) 000220c8:reg(00000000) 000220cc:reg(00000000) 000220d0:reg(00000000) 000220d4:reg(00000000) 000220d8:reg(00000000) 000220dc:reg(00000000) 000220e0:reg(00000000) 000220e4:reg(00000000) 000220e8:reg(00000000) 000220ec:reg(00000000) 000220f0:reg(00000000) 000220f4:reg(00000000) 000220f8:reg(00000000) 000220fc:reg(00000000) 00022100:reg(00000000) 00022104:reg(00000000) 00022108:reg(00000000) 0002210c:reg(00000000) 00022110:reg(00000000) 00022114:reg(00000000) 00022118:reg(00000000) 0002211c:reg(00000000) 00022120:reg(00000000) 00022124:reg(00000000) 00022128:reg(00000000) 0002212c:reg(00000000) 00022130:reg(00000000) 00022134:reg(00000000) 00022138:reg(00000000) 0002213c:reg(00000000) 00022140:reg(00000000) 00022144:reg(00000000) 00022148:reg(00000000) 0002214c:reg(00000000) 00022150:reg(00000000) 00022154:reg(00000000) 00022158:reg(00000000) 0002215c:reg(00000000) 00022160:reg(00000000) 00022164:reg(00000000) 00022168:reg(00000000) 0002216c:reg(00000000) 00022170:reg(00000000) 00022174:reg(00000000) 00022178:reg(00000000) 0002217c:reg(00000000) 00022180:reg(1F1F1F1F) 00022184:reg(1F1F1F1F) 00022188:reg(00000000) 0002218c:reg(00000000) 00022190:reg(1F1F1F1F) 00022194:reg(1F1F1F1F) 00022198:reg(00000000) 0002219c:reg(00000000) 000221a0:reg(00000000) 000221a4:reg(00000000) 000221a8:reg(00000000) 000221ac:reg(00000000) 000221b0:reg(00000000) 000221b4:reg(00000000) 000221b8:reg(00000000) 000221bc:reg(00000000) 000221c0:reg(00000000) 000221c4:reg(00000000) 000221c8:reg(00000000) 000221cc:reg(00000000) 000221d0:reg(00000000) 000221d4:reg(00000000) 000221d8:reg(00000000) 000221dc:reg(00000000) 000221e0:reg(00000000) 000221e4:reg(00000000) 000221e8:reg(00000000) 000221ec:reg(00000000) 000221f0:reg(00000000) 000221f4:reg(00000000) 000221f8:reg(00000000) 000221fc:reg(00000000) 00022200:reg(00000000) 00022204:reg(00000000) 00022208:reg(00000000) 0002220c:reg(00000000) 00022210:reg(00000000) 00022214:reg(00000000) 00022218:reg(00000000) 0002221c:reg(00000000) 00022220:reg(00000000) 00022224:reg(00000000) 00022228:reg(00000000) 0002222c:reg(00000000) 00022230:reg(00000000) 00022234:reg(00000000) 00022238:reg(00000000) 0002223c:reg(00000000) 00022240:reg(00000000) 00022244:reg(00000000) 00022248:reg(00000000) 0002224c:reg(00000000) 00022250:reg(00000000) 00022254:reg(00000000) 00022258:reg(00000000) 0002225c:reg(00000000) 00022260:reg(00000000) 00022264:reg(00000000) 00022268:reg(00000000) 0002226c:reg(00000000) 00022270:reg(00000000) 00022274:reg(00000000) 00022278:reg(00000000) 0002227c:reg(00000000) 00022280:reg(00000000) 00022284:reg(00000000) 00022288:reg(00000000) 0002228c:reg(00000000) 00022290:reg(00000000) 00022294:reg(00000000) 00022298:reg(00000000) 0002229c:reg(00000000) 000222a0:reg(00000000) 000222a4:reg(00000000) 000222a8:reg(00000000) 000222ac:reg(00000000) 000222b0:reg(00000000) 000222b4:reg(00000000) 000222b8:reg(00000000) 000222bc:reg(00000000) 000222c0:reg(00000000) 000222c4:reg(00000000) 000222c8:reg(00000000) 000222cc:reg(00000000) 000222d0:reg(00000000) 000222d4:reg(00000000) 000222d8:reg(00000000) 000222dc:reg(00000000) 000222e0:reg(00000000) 000222e4:reg(00000000) 000222e8:reg(00000000) 000222ec:reg(00000000) 000222f0:reg(00000000) 000222f4:reg(00000000) 000222f8:reg(00000000) 000222fc:reg(00000000) 00022300:reg(00000000) 00022304:reg(00000000) 00022308:reg(00005B15) 0002230c:reg(92257624) 00022310:reg(00000000) 00022314:reg(001E0000) 00022318:reg(00000000) 0002231c:reg(00000000) 00022320:reg(00040000) 00022324:reg(00000000) 00022328:reg(00000000) 0002232c:reg(00000000) 00022330:reg(00000021) 00022334:reg(F0000008) 00022338:reg(00000000) 0002233c:reg(02850000) 00022340:reg(00000000) 00022344:reg(00000000) 00022348:reg(00000000) 0002234c:reg(00000000) 00022350:reg(00000000) 00022354:reg(00000000) 00022358:reg(00000000) 0002235c:reg(00000000) 00022360:reg(00000000) 00022364:reg(00000000) 00022368:reg(00000000) 0002236c:reg(00000000) 00022370:reg(00000000) 00022374:reg(00000000) 00022378:reg(00000000) 0002237c:reg(00000000) 00022380:reg(00000000) 00022384:reg(00000000) 00022388:reg(00000000) 0002238c:reg(00000000) 00022390:reg(00000000) 00022394:reg(00000000) 00022398:reg(00000000) 0002239c:reg(00000000) 000223a0:reg(00000000) 000223a4:reg(0000000C) cpsw-nu-cpts regdump: num_regs(38) 0003d000:reg(4E8A010A) 0003d004:reg(00000021) 0003d008:reg(00000000) 0003d00c:reg(00000000) 0003d010:reg(2D833E42) 0003d014:reg(00000000) 0003d018:reg(00000000) 0003d01c:reg(00000000) 0003d020:reg(00000000) 0003d024:reg(00000000) 0003d028:reg(00000001) 0003d02c:reg(00000000) 0003d030:reg(00000000) 0003d034:reg(A0308EE0) 0003d038:reg(00000000) 0003d03c:reg(00000000) 0003d040:reg(00000068) 0003d044:reg(00000001) 0003d048:reg(00000000) cpsw-nu-ale regdump: num_regs(160) 0003e000:reg(00293904) 0003e004:reg(00000140) 0003e008:reg(80000004) 0003e00c:reg(00000000) 0003e010:reg(00000000) 0003e014:reg(00002706) 0003e018:reg(00000000) 0003e01c:reg(00000000) 0003e020:reg(0000000C) 0003e024:reg(00000000) 0003e028:reg(00000000) 0003e02c:reg(00000000) 0003e030:reg(00000000) 0003e034:reg(00000004) 0003e038:reg(10003333) 0003e03c:reg(00010003) 0003e040:reg(00000013) 0003e044:reg(00000813) 0003e048:reg(00000000) 0003e04c:reg(00000000) 0003e050:reg(00000000) 0003e054:reg(00000000) 0003e058:reg(00000000) 0003e05c:reg(00000000) 0003e060:reg(00000000) 0003e064:reg(00000000) 0003e068:reg(00000000) 0003e06c:reg(00000000) 0003e070:reg(00000000) 0003e074:reg(00000000) 0003e078:reg(00000000) 0003e07c:reg(00000000) 0003e080:reg(00000000) 0003e084:reg(00000000) 0003e088:reg(00000000) 0003e08c:reg(00000000) 0003e090:reg(00000000) 0003e094:reg(00000000) 0003e098:reg(00000000) 0003e09c:reg(00000000) 0003e0a0:reg(00000000) 0003e0a4:reg(00000000) 0003e0a8:reg(00000000) 0003e0ac:reg(00000000) 0003e0b0:reg(00000000) 0003e0b4:reg(00000000) 0003e0b8:reg(00000000) 0003e0bc:reg(00000000) 0003e0c0:reg(00000003) 0003e0c4:reg(00000002) 0003e0c8:reg(00000000) 0003e0cc:reg(00000000) 0003e0d0:reg(00000000) 0003e0d4:reg(00000000) 0003e0d8:reg(00000000) 0003e0dc:reg(00000000) 0003e0e0:reg(00000000) 0003e0e4:reg(00000000) 0003e0e8:reg(00000000) 0003e0ec:reg(00000000) 0003e0f0:reg(00000000) 0003e0f4:reg(00000000) 0003e0f8:reg(00000000) 0003e0fc:reg(00000000) 0003e100:reg(00000000) 0003e104:reg(00000000) 0003e108:reg(00000000) 0003e10c:reg(00000000) 0003e110:reg(00000000) 0003e114:reg(00000000) 0003e118:reg(00000000) 0003e11c:reg(00000000) 0003e120:reg(00000000) 0003e124:reg(00000000) 0003e128:reg(00000000) 0003e12c:reg(00000000) 0003e130:reg(00000000) 0003e134:reg(00008000) 0003e138:reg(00000000) 0003e13c:reg(00000000) cpsw-nu-ale-tbl regdump: num_regs(192) 00000000:reg(20000000) 03100003:reg(00000001) 10002476:reg(2592155B) 0000000c:reg(F000FFFF) ffffffff:reg(00000004) 10000100:reg(5E000001) 00000004:reg(10000180) c2000000:reg(00000004) 10000180:reg(C2000003) 00000004:reg(10000180) c200000e:reg(00000004) 10003333:reg(00000001) 00000004:reg(10003333) ff92155b:reg(00000004) 10000100:reg(5E0000FB) 00000004:reg(10000100) 5e0000fc:reg(00000004) 10003333:reg(000000FB) 00000004:reg(10003333) 00010003:reg(00000000) 00000000:reg(00000000) 00000000:reg(00000000) 00000000:reg(00000000) 00000000:reg(00000000) 00000000:reg(00000000) 00000000:reg(00000000) 00000000:reg(00000000) 00000000:reg(00000000) 00000000:reg(00000000) 00000000:reg(00000000) 00000000:reg(00000000) 00000000:reg(00000000) 00000000:reg(00000000) 00000000:reg(00000000) 00000000:reg(00000000) 00000000:reg(00000000) 00000000:reg(00000000) 00000000:reg(00000000) 00000000:reg(00000000) 00000000:reg(00000000) 00000000:reg(00000000) 00000000:reg(00000000) 00000000:reg(00000000) 00000000:reg(00000000) 00000000:reg(00000000) 00000000:reg(00000000) 00000000:reg(00000000) 00000000:reg(00000000) 00000000:reg(00000000) 00000000:reg(00000000) 00000000:reg(00000000) 00000000:reg(00000000) 00000000:reg(00000000) 00000000:reg(00000000) 00000000:reg(00000000) 00000000:reg(00000000) 00000000:reg(00000000) 00000000:reg(00000000) 00000000:reg(00000000) 00000000:reg(00000000) 00000000:reg(00000000) 00000000:reg(00000000) 00000000:reg(00000000) 00000000:reg(00000000) 00000000:reg(00000000) 00000000:reg(00000000) 00000000:reg(00000000) 00000000:reg(00000000) 00000000:reg(00000000) 00000000:reg(00000000) 00000000:reg(00000000) 00000000:reg(00000000) 00000000:reg(00000000) 00000000:reg(00000000) 00000000:reg(00000000) 00000000:reg(00000000) 00000000:reg(00000000) 00000000:reg(00000000) 00000000:reg(00000000) 00000000:reg(00000000) 00000000:reg(00000000) 00000000:reg(00000000) 00000000:reg(00000000) 00000000:reg(00000000) 00000000:reg(00000000) 00000000:reg(00000000) 00000000:reg(00000000) 00000000:reg(00000000) 00000000:reg(00000000) 00000000:reg(00000000) 00000000:reg(00000000) 00000000:reg(00000000) 00000000:reg(00000000) 00000000:reg(00000000) 00000000:reg(00000000) 00000000:reg(00000000)
#set speed 100Mbps echo ">>> setting speed 100Mbps" ethtool -s eth0 duplex full speed 100 sleep 10 echo ">>> reconfiguring eth0" #set up interface and queue configuration ip link set dev eth0 down #set-channels: 3 tx queues tx0 highest tx2 lowest prio ethtool -L eth0 tx 3 #have to disable rrobin ethtool --set-priv-flags eth0 p0-rx-ptype-rrobin off #bring up eth0 interface ip link set dev eth0 up sleep 20 echo ">>> loading switch config" #Setup EST schedule with 3 Gates (Q0-Q2). For description of Command parameters, see man tc-taprio. #3 traffic classes #priority map: p[0,1,4..15] <-> TC0, p2 <-> TC1, p3 <-> TC2 #queues: read "TC0: 1 queue at offset 0, TC1: 1 queue at offset 1, TC2: 1 queue at offset 2" #TC0 <-> Q0, TC1 <-> Q1, and TC2 <-> Q2 tc qdisc replace dev eth0 parent root handle 100 taprio \ num_tc 3 \ map 0 0 1 2 0 0 0 0 0 0 0 0 0 0 0 0 \ queues 1@0 1@1 1@2 \ base-time 0000 \ sched-entry S 4 2500000 \ sched-entry S 2 2500000 \ sched-entry S 1 5000000 \ flags 2 #Where num_tc is same as number of queues = 3, map, maps 16 priorities to one of 3 TCs, queues specify the #Queue associated with each TC, TC0 - One queue @0, TC1 - One queue @1 and TC2 - One queue @2 # sched-entry S 4 125000 # S - SetGateStates operation # 4 - Bit mask showing bit 2 set (Q2/TC2) # 125000 - 125000 nsecs (125 usecs ) duration of Gate open # The cycle-time is 500 usec sleep 10 echo ">>> enabling classifier" #enable classifier. Classifier is used to mark the packet based on packet meta data. For example UDP port #number tc qdisc add dev eth0 clsact sleep 15 echo ">>> supplying filters" #Using tc filter command edit the SKB priority based on udp port number. i.e Udp port 5003 -> prio 3 (TC2/Q2), port 5002 -> prio 2 (TC1/Q1), 5001 -> prio 1( TC0/Q0) tc filter add dev eth0 egress protocol ip prio 1 u32 match ip dport 5003 0xffff action skbedit priority 3 sleep 5 tc filter add dev eth0 egress protocol ip prio 1 u32 match ip dport 5002 0xffff action skbedit priority 2 sleep 5 tc filter add dev eth0 egress protocol ip prio 1 u32 match ip dport 5001 0xffff action skbedit priority 1 sleep 5 #Network core and Driver uses the skb priority to deliver frames to specific h/w queues. In the above case, #priority 3 SKB (packet) goes to Q2 (4th entry in map in the tc qdisc command), priority 2 SKB goes to Q1 #(3rd entry in map) and priority 1 SKB goes to Q0 (2nd entry in map) echo ">>> done..."
Hi Vineet,
I think all my questions so far have been TSN-related, but considering this issue to be about the demo example, I will do as you propose
best Stefan
Hi Stefan,
Thanks. I think we can pause any TSN related configuration right now till SDK 8.1 comes out.
Regards
Vineet
