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66AK2H14: 10GbE KR mode training example

Part Number: 66AK2H14

Hi,

 

I’m searching for an example of 10 Gigabit Ethernet KR  training for 66AK2H14, in order to implement it on the C6x core.

In the SPRAC37 document (April 2016 version), in § 3.2, it is said that it is supported in Linux kernel.

However, I don’t find any 10 Gigabit Ethernet KR  training code in the K2H kernel. I’m searching in the Linux kernel provided by the SDK Ti-processor-sdk-linux-k2hk-evm-05.00.00.15.

Where could I find a KR training example for 66AK2H14 ?

 

Thanks in advance,

 

JP

  • Hi,

     

    10GBase-KR is also treated in §11.4 of SPRUHO3B (revision of November 2015).

    It is spoken of  an initialization sequence for the 10G Firmware that is provided by the TI MCSDK/CSL. I effectively found the CSL_10GeSerdesFirmwareInit() function but it is hard to use and understand because no documentation is provided, and reserved registers are accessed in it.

    This function however seems interesting to implement 10Gbase KR training because a structure field named "enable_10Gtrain" is set.

     

    If this function can be used to implement 10GBase-KR training, is it possible to get an example ?

     

    Thanks in advance,

     

    JP

  • Hi Jean,

    My apologies for the delay, Configuring the 10GBe interface is shown in following link

    https://software-dl.ti.com/processor-sdk-linux/esd/docs/06_03_00_106/linux/Foundational_Components/Kernel/Kernel_Drivers/Network/NetCP.html

    Steps to configure KNAV(Keystone Navigator) and support for Ethernet APIS are shown. "10G Serdes" device tree configuration also avaliable.

    Also, K2H RTOS SERDES diagnostics example can be found in this link, but driver available only for Linux and RT-Linux.

    https://software-dl.ti.com/processor-sdk-rtos/esd/docs/latest/rtos/index_device_drv.html#serdes-diag

    Though link mentions only support for Keystone 3, keystone 2 source also available in K2H RTOS SDK.

    Thanks & Regards,

    Rajarajan U

  • Hi Rajarajan U,

     

    Thanks for your response.

     

    After studying the corresponding information, I found nothing about the subject I’m interested in: the 10Gbe base KR training.

     

    Where is it possible to get an example of code on Keystone 2 architecture for 10Gbe base KR training (I’m using a C6x core on C66AK2H14)?

     

    Thanks in advance,

     

    JP

  • Dear Jean,

    Good day!.

    I am not an expert in serdes-10Gbe, However....

    Able to find/generate three Serdes example projects in the pdk_k2hk_4_0_16 for K2H.

    They are 

    1. serdes_diag_ber_K2HC66ExampleProject 
    2. serdes_diag_eye_K2HC66ExampleProject
    3. serdes_diag_prbs_K2HC66ExampleProject

    ----

    Download PROCESSOR-SDK-RTOS-K2HK  06_03_00_106
    https://software-dl.ti.com/processor-sdk-rtos/esd/K2HK/latest/index_FDS.html

    and run the script file, pdkProjectCreate.bat  in the command prompt. It will create the serdes examples for you.

    C:\ti\pdk_k2hk_4_0_16\packages>pdkProjectCreate.bat K2H all little all all dsp "C:\ti\pdk_k2hk_4_0_16\packages"

    ---

    Please check whether those examples are sufficient for you.

    --

    Regards

    Shankari

  • Hi Shankari,

    I am the FAE supporting this customer. Thank you for your efforts in supporting them. To clarify where they stand: they have 10GbE communication working in their lab. It performs well and they have no problem there. What they want to enable is the KR training procedure that's supposedly supported by our interface, but unfortunately it is not well documented nor do we provide an example for that. This is what my customer is looking for. It does not look to me that the BER or eye diagram examples that you pointed to above will answer the KR training question. Could you or the team help please? Thank you.


    Best regards,
    François.

  • Francois

    From the PDK projects that Shankari pointed, you will see a header file that has what we assume is the training routine , which can be used as an example.

    csl_serdes2_10ge.h

    CSL_10GeSerdesFirmwareInit is the right API

  • Hi Mukul,

    Thank you for your note. I will let Jean-Philippe Hallay pursue this discussion.


    Best regards,
    François.

  • Hi all,

    Thanks for this information.

    I'm going to try CSL_10GeSerdesFirmwareInit in order to configure SERDES and activate the training.

    Best regards

    JP

  • Hi,

    I could see "10GE KR 10.3125 1.00E-12 0.3 45" in the "EyeMaskSummary.txt"

    As per the serdes user guide located at "pdk_k2hk_4_0_16\packages\ti\diag\serdes_diag\docs"

    using the "Eye Diagram Viewer" , the eye mask selection and the lane rate selection are done through this txt file....

    Please do check whether the DSS script and the tests provided can be utiliised for the 10GE KR mode....

    Attached the userguide here: Serdes_Diag_User_Guide.pdf

    Eye Diagram Viewer (EyeDiagramViewer.jar) is located at serdes_diag/tools/eye_diagram_tool

    And also, I could see the 10GE selection as a peripheral to choose, 

    Regards

    Shankari

  • Hi,

     

    Thanks the answers.

     

    I tried to use the CSL function CSL_10GeSerdesFirmwareInit, with no success. What I did is:

     

    1)       Configure successfully a KR link between 10GbE port 1 of C66AK2H14 and a COTS Ethernet switch. The 10GbE init code uses the discrete CSL functions: CSL_10GeSerdesTXBClkMode(), CSL_10GeSerdesInit(), CSL_10GeSerdesLaneConfig (), CSL_10GeSerdesComEnable(), CSL_SerdesLaneEnable(), and CSL_10GeSerdesEnableXGMIIPort(). This demonstrates  that my hardware configuration is OK (the SERDES link goes up and is able to transfer data at 10G).

    Also note that :

    • the hardware platform is such that external serdes clock is running at 156.25MHz.
    • training and autoneg feature of the COTS are disabled.


    This is a reference configuration before the next step. 

     

    2)      Replace the 6 CSL functions above by the unique CSL_10GeSerdesFirmwareInit function, as described in the CSL_serdes2_10ge.h file. For this init, I proceed as follow:

     

    The training and autoneg features of the COTS are enabled.

     

    The result is that the serdes  link never goes up.

     

    We also can see that none of the Kepler TX(ATT,C1,C2,CM) are updated . The LN1_SD_STATE and LN0_SD_STATE from PLL_CTRL register also remain to '0'.

     

    NB: 10GbE KR is on 10 GbE lane 1. 10GbE lane 0 is connected in XFI to a PHY. Lane 0 init also succeeded with the 6 CSL function calls,  and fails with the CSL_10GeSerdesFirmwareInit call above.

     

    Question 1: what is the purpose of txbclk_enable switch. Should it be set to '1' or '0'

    (note: we did both experiments with '1' and '0' with same result)

    Question 2 : apart from calling CSL_10GeSerdesFirmwareInit function, are there some other init to perform BEFORE, or AFTER  in order to get the link operational ?

    Question 3: Since the CSL_10GeSerdesFirmwareInit call performs lane 0 and lane 1 initialization, does an incorrect initialization of one lane impacts the initialization of the other one.

     

     

    3)      Do the same as step 2) but enabling training on the C66AK2H14, lane 1,  ( see next code extract) as well as the COTS Ethernet switch: ==> the result is also KO.

     

     

    The training is absolutely necessary for us  because links are going to backplane to several slots.

     

    Could you help me to use CSL_10GeSerdesFirmwareInit(). The problem is that this function accesses reserved registers and uses a firmware that is a black box.

     

    Thanks for your help.

     

    JP

  • Question 1: what is the purpose of txbclk_enable switch. Should it be set to '1' or '0'

    Arun>> For 1G mode, txbclk enable should be set to 1. For 10G mode it can be set to 0. This is a tx byte clock mux select where it selects the PMA generated clock source or top level wrapper source clock. 

    (note: we did both experiments with '1' and '0' with same result)

    Question 2 : apart from calling CSL_10GeSerdesFirmwareInit function, are there some other init to perform BEFORE, or AFTER  in order to get the link operational ?

    Arun>> CSL_10GeSerdesFirmwareInit should replace all the functions you have used to bring the link up. The link should have been operational with just this API. 

    Question 3: Since the CSL_10GeSerdesFirmwareInit call performs lane 0 and lane 1 initialization, does an incorrect initialization of one lane impacts the initialization of the other one.

    Arun>> This API initialize both lanes. Do you plan to use one lane without the firmware? If so, i think the API needs to have a lane mask instead of initializing both lanes.