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TDA4VM: MCU_R5F how to remapping the exception vector table

Part Number: TDA4VM

Hi,

I don't know how to remapping the exception vector table。

I found the MCU_SEC_MMR0_CFG0 registers, but I cannot access them. If these registers are accessed, the MCU will reset.

Are there some documents or examples to introduce how to implement the remapping function?

Thanks

  • Hi,

    These registers are accessible only via sciclient interface. So you need to call Sciclient APIs to set these registers.

    Where do you want to move exception vector table? In which bootflow?

    Regards,

    Brijesh

  • Hi,

    I have my own exception vector handling function.I want to enter my own exception handling function when an exception occurs.

    Remap the exception vector table in the APP.

    Use the Sciclient_procBootSetProcessorCfg function to remap the vector table, but the function returns -1.

    Sciclient_init() return 0;

    proc_set_config_req.processor_id = 1;
    proc_set_config_req.bootvector_lo = 0x41c3c100;
    proc_set_config_req.bootvector_hi = 0x0;
    proc_set_config_req.config_flags_1_set = 0;
    proc_set_config_req.config_flags_1_clear = 0;

    ciclient_procBootSetProcessorCfg(&proc_set_config_req,0xffffffff) return -1.

    Is there a problem with this operation?

    Thanks

  • Hi,

    is the core already running? Because if it is already running, then you might not be able to change this register. 

    Please refer to SBL_SlaveCoreBoot API in the file ti-processor-sdk-rtos-j721e-evm-07_03_00_07\pdk_jacinto_07_03_00_29\packages\ti\boot\sbl\soc\k3\sbl_slave_core_boot.c for further information on how it can be done. 

    Regards,

    Brijesh

  • Hi,

    Thank you for your answer.

    I have another question. Can I modify the vector table address during CCS loading launch.js? If not, how can I debug via CSS?

    Thanks,

  • Hi yan gang,

    I really dont think you can modify this registers from launch.js script. 

    But why do you want to update these registers in script/code? This will be taken care by the program loader, like SBL if you are using SBL or CCS if you are using ccs boot flow. 

    Regards,

    Brijesh

  • Hi Brijesh,

    Now the address of the interrupt vector table is 0x00000000.But it is the location of the SBL interrupt vector table.

    My app cannot use this address.

    I want to remap the interrupt vector to 0x41c3c100.I don’t know what to do it.

  • Hi yan gang,

    But SBL supports vector table at different location. For example, when SBL loads boot application on the same mcu1_0 core, where boot application uses TCMB memory for storing boot vectors, it works fine. 

    Regards,

    Brijesh

  • Hi Brijesh,

    Thank you for your answer.

    Can I only modify it in sbl? How to modify the vector table address when using CCS debugging?

    Thanks,

  • Hi yan gang,

    I did not get it, why do you want to change in SBL. SBL already takes care of moving vector table correctly. Any change required here?

    For CCS, please change it in liner command file.

    Regards,

    Brijesh

  • Hi Brijesh,
    Thank you for your answer.

    1.   Edit the code file sciclient_ ccs_ init_ main. c line 327, m via sciclient_ Procbootsetprocessorcfg sets the address of the new interrupt vector table: 0x41c3c100

    2.   Start MCU1_0 through CCS debugger

     3. Through sciclient_procbootgetprocessorstate The API interface obtains The value of bootvector_lo is 0x41c00000

    Why is the MCU interrupt vector table 0x41c3c100 not written successfully, but the initialization value 41c00000 ?


      //read 
        struct tisci_msg_proc_get_status_resp cpuStatus;
        status = Sciclient_procBootGetProcessorState(1, &cpuStatus, 0xffffffff);
        if (status != CSL_PASS)
        {
             printf("Sciclient_procBootSetProcessorCfg...FAILED \n"); 
        } 
        else 
        {
            printf("[old] bootvector_lo:%x bootvector_hi:%x \n", cpuStatus.bootvector_lo,
                                  cpuStatus.bootvector_hi);
        }
        
        //write 
        struct tisci_msg_proc_set_config_req  proc_set_config_req;
        proc_set_config_req.processor_id = 1;
        proc_set_config_req.bootvector_lo = 0x41c3c100;
        proc_set_config_req.bootvector_hi = 0x0;
        proc_set_config_req.config_flags_1_set = 0;
        proc_set_config_req.config_flags_1_clear = 0;
    
         status =  Sciclient_procBootSetProcessorCfg(&proc_set_config_req,0xffffffff);
        if (status == CSL_PASS)
        {
            printf("Sciclient_procBootSetProcessorCfg...success \n");
        } 
        else 
        {
            printf("Sciclient_procBootSetProcessorCfg...FAILED \n");     
        }
    
        status = Sciclient_procBootGetProcessorState(1, &cpuStatus, 0xffffffff);
        if (status != CSL_PASS)
        {
             printf("Sciclient_procBootSetProcessorCfg...FAILED \n"); 
        } 
        else 
        {
            printf("Sciclient_procBootGetProcessorState...success \n");
            printf("[new] bootvector_lo:%x bootvector_hi:%x \n", cpuStatus.bootvector_lo,
                                  cpuStatus.bootvector_hi);
        }

    Thanks ! 

  • Hi Yan Gang,

    Could you please check this register from M3 (DMSC) core? This will not be accessible from MCU R5F. 

    After changing it using SetProcessorCfg API, you should be able to see it changed from M3.

    Regards,

    Brijesh