Part Number: PROCESSOR-SDK-AM64X
Hi, I am trying to bring up processor SDK 8.0 Linux on my custom board based on AM64 GPEVM.
Based on my logs, I think that the SPL is getting loaded and U-boot starts to load but ends up hanging with the following logs (obtained via enabling debug msgs):
clk_set_defaults(flash@0) clk_set_default_parents: could not read assigned-clock-parents for 802399b0 ofnode_read_prop: assigned-clock-rates: <not found> cadence_qspi_apb_config_baudrate_div: ref_clk 166666666Hz sclk 25000000Hz Div 0x3, actual 20833333Hz cadence_spi_set_speed: speed=25000000 cadence_qspi_apb_chipselect : chipselect 0 decode 0 cadence_qspi_apb_chipselect : chipselect 0 decode 0 size=x, ptr=40, limit=640: aligned to 81f00600 cadence_qspi_apb_chipselect : chipselect 0 decode 0 cadence_qspi_apb_chipselect : chipselect 0 decode 0 jedec_spi_nor flash@0: Unknown command extension type cadence_qspi_apb_chipselect : chipselect 0 decode 0 cadence_qspi_apb_chipselect : chipselect 0 decode 0 cadence_qspi_apb_chipselect : chipselect 0 decode 0 cadence_qspi_apb_chipselect : chipselect 0 decode 0 cadence_qspi_apb_chipselect : chipselect 0 decode 0 cadence_qspi_apb_chipselect : chipselect 0 decode 0 cadence_qspi_apb_chipselect : chipselect 0 decode 0 spi_get_bus_and_cs: bus=80239828, slave=81f00598 fdtdec_get_config_int: u-boot,spl-payload-offset jedec_spi_nor flash@0: from 0x00280000, len d cadence_qspi_apb_chipselect : chipselect 0 decode 0 Found FIT jedec_spi_nor flash@0: from 0x00280000, len d cadence_qspi_apb_chipselect : chipselect 0 decode 0 fit read sector 280000, sectors=1300, dst=807ffac0, count=1300, size=0x514 Selecting config 'k3-am642-evm' firmware: 'firmware-1' jedec_spi_nor flash@0: from 0x00280514, len d cadence_qspi_apb_chipselect : chipselect 0 decode 0
I am trying to boot from QSPI and have removed the last 4 pins and have also set the tx, rx bus width to 4 in ospi dts file (k3-am642-evm.dts). Since the QSPI is based on Winbond, I have added the following entry in drivers/mtd/spi/spi-nor-ids.c { INFO("w25q01jv", 0xef4021, 0, 64 * 1024, 2048, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, and added CONFIG_SPI_FLASH_WINBOND=y in both A53 and R5 defconfigs.
How do I proceed to debug and solve this ?
Any help is appreciated