Hello,
appMemCache is blocked for a72. Why A72 doesn't need CachWb? How to prevent memory coherency problem?
vx_status tivxMemBufferUnmap( void *host_ptr, uint32_t size, vx_enum mem_type, vx_enum maptype) { vx_status status = (vx_status)VX_SUCCESS; if ((NULL != host_ptr) && (0U != size)) { if (((vx_enum)TIVX_MEMORY_TYPE_DMA != mem_type) && (((vx_enum)VX_WRITE_ONLY == maptype) || ((vx_enum)VX_READ_AND_WRITE == maptype))) { #ifndef A72 appMemCacheWb( host_ptr, size); #endif } } else { status = (vx_status)VX_FAILURE; VX_PRINT(VX_ZONE_ERROR, "tivxMemBufferUnmap failed (either pointer is NULL or size is 0)\n"); } return status; }
Best regards,
Wilson.