Part Number: AM5728
Hi,
I am working on DCAN example loopback code given in AM572x SDK with TI RTOS. It works fine in loopback mode, but when I am trying to work in normal mode it simply does not transmit, neither receive any data over CAN bus. I went through following thread:
AM5728: Dcan normal mode configure - Processors forum - Processors - TI E2E support forums
But the workaround given here didn't work for me. This is the pin mux done in the code:
---------------
HW_WR_FIELD32(CSL_MPU_L4PER_CM_CORE_REGS + CM_L4PER2_CLKSTCTRL,
CM_L4PER2_CLKSTCTRL_CLKTRCTRL,
CM_L4PER2_CLKSTCTRL_CLKTRCTRL_SW_WKUP);
HW_WR_FIELD32( CSL_MPU_CORE_CM_CORE_REGS + CM_L4CFG_CLKSTCTRL,
CM_L4CFG_CLKSTCTRL_CLKTRCTRL,
CM_L4CFG_CLKSTCTRL_CLKTRCTRL_NO_SLEEP);
/*pin mux for dcan2_tx*/
HW_WR_REG32(CSL_MPU_CORE_PAD_IO_REGISTERS_REGS+CSL_CONTROL_CORE_PAD_IO_PAD_GPIO6_14,0x2);
/*pin mux to default muxmode for dcan2_rx*/
HW_WR_REG32(CSL_MPU_CORE_PAD_IO_REGISTERS_REGS+CSL_CONTROL_CORE_PAD_IO_PAD_GPIO6_15,0x0);
// HW_WR_REG32(CSL_MPU_CORE_PAD_IO_REGISTERS_REGS+CSL_CONTROL_CORE_PAD_IO_PAD_GPIO6_15,0x2);
/*CM_L4PER2_DCAN2_CLKCTRL*/
HW_WR_FIELD32(CSL_MPU_L4PER_CM_CORE_REGS + CM_L4PER2_DCAN2_CLKCTRL,
CM_L4PER2_DCAN2_CLKCTRL_MODULEMODE,
CM_L4PER2_DCAN2_CLKCTRL_MODULEMODE_ENABLE);
while ((HW_RD_FIELD32(CSL_MPU_L4PER_CM_CORE_REGS + CM_L4PER2_DCAN2_CLKCTRL,
CM_L4PER2_DCAN2_CLKCTRL_IDLEST)) ==
CM_L4PER2_DCAN2_CLKCTRL_IDLEST_DISABLE)
{
;
}
/* Clear the start bit so that pulse is generated when run second time */
HW_WR_FIELD32((uint32_t) CSL_MPU_CTRL_MODULE_CORE_CORE_REGISTERS_REGS +
CTRL_CORE_CONTROL_IO_2,
CTRL_CORE_CONTROL_IO_2_DCAN2_RAMINIT_START,
0U);
HW_WR_FIELD32((uint32_t) CSL_MPU_CTRL_MODULE_CORE_CORE_REGISTERS_REGS +
CTRL_CORE_CONTROL_IO_2,
CTRL_CORE_CONTROL_IO_2_DCAN2_RAMINIT_START,
CTRL_CORE_CONTROL_IO_2_DCAN2_RAMINIT_START_SET);
status =((uint32_t) 0x1 <<
CTRL_CORE_CONTROL_IO_2_DCAN2_RAMINIT_DONE_SHIFT) &
CTRL_CORE_CONTROL_IO_2_DCAN2_RAMINIT_DONE_MASK;
while (status !=((status &
HW_RD_REG32(CSL_MPU_CTRL_MODULE_CORE_CORE_REGISTERS_REGS +
CTRL_CORE_CONTROL_IO_2))))
{
;
}
/* Write one to clear done bit */
HW_WR_FIELD32((uint32_t) CSL_MPU_CTRL_MODULE_CORE_CORE_REGISTERS_REGS +
CTRL_CORE_CONTROL_IO_2,
CTRL_CORE_CONTROL_IO_2_DCAN2_RAMINIT_DONE,1U);
/*pin mux for dcan2_rx*/
HW_WR_REG32(CSL_MPU_CORE_PAD_IO_REGISTERS_REGS+CSL_CONTROL_CORE_PAD_IO_PAD_GPIO6_15,0x0);
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However it is not working at all. I tried changing the pin mux for DCAN2_RX with 0x2, that also not working.
Please help what is going wrong with DCAN normal operation.
SOC: AM572x
SDK used: processor_sdk_rtos_am57xx_06_03_02_08
Thanks and Regards
Raj Johri
