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AM4378: XDS200 Error connecting to the target

Utku Uygun
Prodigy 155 points
Part Number: AM4378

Hi,

We are trying to debug our custom board with AM4378 with XDS200 JTAG probe, we define target configuration as follows:

Debug probe is successfully detected and can debug, logs about it as follows:

Fullscreen XDS200 LOG.txt Download 
[Start: Texas Instruments XDS2xx USB Debug Probe_0]

Execute the command:

%ccs_base%/common/uscif/dbgjtag -f %boarddatafile% -rv -o -S integrity

[Result]


-----[Print the board config pathname(s)]------------------------------------

C:\Users\utkuuy\AppData\Local\TEXASI~1\CCS\
    ccs1030\0\0\BrdDat\testBoard.dat

-----[Print the reset-command software log-file]-----------------------------

This utility has selected a 560/2xx-class product.
This utility will load the program 'xds2xxu.out'.
The library build date was 'Jan 31 2021'.
The library build time was '19:18:41'.
The library package version is '9.3.0.00042'.
The library component version is '35.35.0.0'.
The controller does not use a programmable FPGA.
The controller has a version number of '13' (0x0000000d).
The controller has an insertion length of '0' (0x00000000).
This utility will attempt to reset the controller.
This utility has successfully reset the controller.

-----[Print the reset-command hardware log-file]-----------------------------

This emulator does not create a reset log-file.

-----[Perform the Integrity scan-test on the JTAG IR]------------------------

This test will use blocks of 64 32-bit words.
This test will be applied just once.

Do a test using 0xFFFFFFFF.
Scan tests: 1, skipped: 0, failed: 0
Do a test using 0x00000000.
Scan tests: 2, skipped: 0, failed: 0
Do a test using 0xFE03E0E2.
Scan tests: 3, skipped: 0, failed: 0
Do a test using 0x01FC1F1D.
Scan tests: 4, skipped: 0, failed: 0
Do a test using 0x5533CCAA.
Scan tests: 5, skipped: 0, failed: 0
Do a test using 0xAACC3355.
Scan tests: 6, skipped: 0, failed: 0
All of the values were scanned correctly.

The JTAG IR Integrity scan-test has succeeded.

-----[Perform the Integrity scan-test on the JTAG DR]------------------------

This test will use blocks of 64 32-bit words.
This test will be applied just once.

Do a test using 0xFFFFFFFF.
Scan tests: 1, skipped: 0, failed: 0
Do a test using 0x00000000.
Scan tests: 2, skipped: 0, failed: 0
Do a test using 0xFE03E0E2.
Scan tests: 3, skipped: 0, failed: 0
Do a test using 0x01FC1F1D.
Scan tests: 4, skipped: 0, failed: 0
Do a test using 0x5533CCAA.
Scan tests: 5, skipped: 0, failed: 0
Do a test using 0xAACC3355.
Scan tests: 6, skipped: 0, failed: 0
All of the values were scanned correctly.

The JTAG DR Integrity scan-test has succeeded.

[End: Texas Instruments XDS2xx USB Debug Probe_0]

[Start: Texas Instruments XDS2xx USB Debug Probe_1]

Execute the command:

%ccs_base%/common/uscif/dbgjtag -f %boarddatafile% -rv -o -S integrity

[Result]


-----[Print the board config pathname(s)]------------------------------------

C:\Users\utkuuy\AppData\Local\TEXASI~1\CCS\
    ccs1030\0\0\BrdDat\testBoard.dat

-----[Print the reset-command software log-file]-----------------------------

This utility has selected a 560/2xx-class product.
This utility will load the program 'xds2xxu.out'.
The library build date was 'Jan 31 2021'.
The library build time was '19:18:41'.
The library package version is '9.3.0.00042'.
The library component version is '35.35.0.0'.
The controller does not use a programmable FPGA.
The controller has a version number of '13' (0x0000000d).
The controller has an insertion length of '0' (0x00000000).
This utility will attempt to reset the controller.
This utility has successfully reset the controller.

-----[Print the reset-command hardware log-file]-----------------------------

This emulator does not create a reset log-file.

-----[Perform the Integrity scan-test on the JTAG IR]------------------------

This test will use blocks of 64 32-bit words.
This test will be applied just once.

Do a test using 0xFFFFFFFF.
Scan tests: 1, skipped: 0, failed: 0
Do a test using 0x00000000.
Scan tests: 2, skipped: 0, failed: 0
Do a test using 0xFE03E0E2.
Scan tests: 3, skipped: 0, failed: 0
Do a test using 0x01FC1F1D.
Scan tests: 4, skipped: 0, failed: 0
Do a test using 0x5533CCAA.
Scan tests: 5, skipped: 0, failed: 0
Do a test using 0xAACC3355.
Scan tests: 6, skipped: 0, failed: 0
All of the values were scanned correctly.

The JTAG IR Integrity scan-test has succeeded.

-----[Perform the Integrity scan-test on the JTAG DR]------------------------

This test will use blocks of 64 32-bit words.
This test will be applied just once.

Do a test using 0xFFFFFFFF.
Scan tests: 1, skipped: 0, failed: 0
Do a test using 0x00000000.
Scan tests: 2, skipped: 0, failed: 0
Do a test using 0xFE03E0E2.
Scan tests: 3, skipped: 0, failed: 0
Do a test using 0x01FC1F1D.
Scan tests: 4, skipped: 0, failed: 0
Do a test using 0x5533CCAA.
Scan tests: 5, skipped: 0, failed: 0
Do a test using 0xAACC3355.
Scan tests: 6, skipped: 0, failed: 0
All of the values were scanned correctly.

The JTAG DR Integrity scan-test has succeeded.

[End: Texas Instruments XDS2xx USB Debug Probe_1]

But when we try to connect the A9 core an error occurs, here is the error log:

Error connecting to the target:

(Error -1170 @ 0x0)

Unable to access the DAP. Reset the device, and retry the operation. If error persists, confirm configuration, power-cycle the board, and/or try more reliable JTAG settings (e.g. lower TCLK).

(Emulation package 9.3.0.00042)

Note: We tried to lower the TCLK but it didn't work.

Do we need to configure extra things or upload an extra file? Do you have an idea about the problem that we've faced with?

Schematic's part:

(We've tried remove or insert pull-up/pull-downs exactly same with EVM's with CTI header connections but we still get the same error.)

  • 0
    TI__Guru 62855 points

    I need to assign your post to someone that knows how to configure and use the debugger. However, I will provide a few hardware related comments below even though they may not resolve your connection problems.

    We typically recommend external pull-up resistors on all JTAG signals except TRSTn. 

    The pull-down recommendation on TRSTn is to ensure the JTAG TAP controller remains in reset during normal operation.

    The 100 ohm series resistor on the SYS_RESETn signal should be inserted between the 100nF capacitor and the JTAG connector. The series resistor and shunt capacitor provides a low pass filter that prevents noise from coupling into the debugger cable and propagating to the system reset signal, which can producing unexpected resets. It looks like you may have copied this connection topology from the AM437x Industrial EVM which I just realized has the resistor in the wrong place. I will notify the EVM team of this error.

    Reducing the JTAG clock frequency should resolve any timing related issues since signals are launched on one edge of the clock and latched on the other edge of the clock. The resulting increased clock period provides more setup time and more hold time. Try connecting with a very slow JTAG clock until you get everything working.  You can try increasing it once you get everything working as expected.

    Regards,
    Paul

  • 0
    TI__Guru**** 463941 points
    Utku Uygun said:

    Error connecting to the target:

    (Error -1170 @ 0x0)

    Unable to access the DAP. Reset the device, and retry the operation. If error persists, confirm configuration, power-cycle the board, and/or try more reliable JTAG settings (e.g. lower TCLK).

    (Emulation package 9.3.0.00042)

    This error is described in the below link:

    https://software-dl.ti.com/ccs/esd/documents/ccs_debugging_jtag_connectivity_issues.html#cannot-access-the-dap

    Since the low-level connectivity tests pass, the issue more likely due to the board being in a bad state.

    If you try accessing the DAP directly (as mentioned in the above link), are you able to connect to just the DAP?

    Thanks

    ki

  • 0 in reply to Ki
    Prodigy 155 points

    Hi,

    Thanks for your help. Yes, It seems we can access the DAP, no error occurs.

    Target status:

    Cortex A9 seems unavailable, is it normal? What can be reason of this?

  • 0 in reply to Utku Uygun
    TI__Guru**** 463941 points
    Utku Uygun said:
    Cortex A9 seems unavailable, is it normal? What can be reason of this?

    That is normal. It is unavailable because you are not connected to the CPU.

    I do not have any issues connecting to the A9:

    I am using the same debug probe settings are you are. There must be some issue with your target. Since the JTAG connectivity test passes, the low level connections are fine. Have you ever been able to connect to this board at all? Or has it never been successful?

    Thanks

    ki

  • 0 in reply to Ki
    Prodigy 155 points

    It's our first try. It has never been successful before.

  • +1 in reply to Utku Uygun
    TI__Guru**** 463941 points

    It is likely some issue with the device state. I will need to have a device expert investigate further.

  • 0 in reply to Ki
    Prodigy 155 points

    Hi,

    We've resolved this issue by removing R11, disconnecting JTAG from SYS_RESETn node. When we connected the XDS200, it kept our SoC in reset.