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AM6528: Use one MDIO to configure PHY on cpsw and pru-eth

Part Number: AM6528

Customer needs two ethernet port, as there is only one external port of CPSW on AM65xx, so use one PRU ethernet as second port. 

Question:

Can use one MDIO port to control the two ethernet port on CPSW and PRU? if yes, would you please give a example for customer?

Software: Linux Processor SDK7.x or 8.x

  • Hi,

    Sorry for the delay

    Can use one MDIO port to control the two ethernet port on CPSW and PRU?

    Yes, you can use a single MDIO port.

    if yes, would you please give a example for customer?

    Please take a look at AM64 EVM, it has what you are asking for, a single MDIO controls both CPSW and ICSSG1 ports. You can see the pinmuxing, schematics here https://www.ti.com/tool/TMDS64GPEVM

    Regards

    Vineet

  • Vineet,

    Sorry for did not clear state, I mean a software example, dts configuration.

    I checked AM64x EVM schematic, summarize PHY circuit as below. ICSSG RGMII1 and CPSW RGMII 1 use different MIDO port, ICSSG1 RGMII2 can select one of the MDIO port.

    From PINMUX, the PRU PRG1_RGMII2 and CPSW RGMII2 share the same group pins, seems the design intent to use different MDIO port for CPSW and PRU Ethernet ports. When configure ICSSG1_RGMII2 as CPSW port, then configure U27 mux to select CPSW_RGMII1_MDIO, if configure ICSSG1_RGMII2 as PRG_RGMII2 signals, select PRG1_MIDO_MDIO from U27 mux as the PHY MDIO.

    so use separated MDIO for CPSW and PRU Ethernet port.