SPI chip select OMAP3530

Other Parts Discussed in Thread: OMAP3530We encounter a problem with the "Chipselect" pins on SPI3 bus on OMAP3530. When we use CS0, it works perfectly, but when we try to use CS1, the corresponding pin is always on low level (chipselect activated). We configured both CS0 and CS1 pins with same options, as following on uboot : evm.h MUX_VAL(CP(ETK_D0_ES2 ), (IEN | PTD | DIS | M1)) /*SPI3_MOSI*/\ MUX_VAL(CP(ETK_D1_ES2 ), (IEN | PTU | EN | M1)) /*SPI3_MISO*/\ MUX_VAL(CP(ETK_D2_ES2 ), (IDIS | PTU | EN | M1)) /*SPI3_CS0*/\ MUX_VAL(CP(ETK_D3_ES2 ), (IEN | PTD | DIS | M1)) /*SPI3_CLK*/\ MUX_VAL(CP(ETK_D7_ES2 ), (IDIS | PTU | EN | M1)) /*SPI3_CS1*/\ Since there is still a difference, we tried to configure in the kernel with the following lines : board-omap3evm.c static struct omap_board_mux board_mux[] __initdata = { ... OMAP3_MUX(MCSPI1_CS1, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP |OMAP_PIN_OFF_INPUT_PULLUP | OMAP_PIN_OFF_OUTPUT_LOW), OMAP3_MUX(ETK_D1, 0x3119), OMAP3_MUX(ETK_D2, OMAP_MUX_MODE1 | OMAP_PIN_INPUT_PULLUP |OMAP_PIN_OFF_INPUT_PULLUP | OMAP_PIN_OFF_OUTPUT_HIGH ), OMAP3_MUX(ETK_D7, OMAP_MUX_MODE1 | OMAP_PIN_INPUT_PULLUP | OMAP_PIN_OFF_INPUT_PULLUP | OMAP_PIN_OFF_OUTPUT_HIGH), ... once again, CS0 works fine, but CS1 keeps low level at any time. There is no MUX conflict with other pins, so we don't understand where is the mistake. Thanks for your help